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Looking for Memory Recommendation for Spartan 3E 1200

Hi everyone,

I'm working on a Board for Bus Interfacing and some Audio Processing, which will use Spartan 3E 1200 and the Microblaze. Now I'm not sure what kind of memory I should use. Size ist not too important for me. 8Mbytes would be ok, but more is always better. But the speed should be high enough to get the Microblaze run at a decent speed and to allow permanent storing auf 4 stereo audio streams. Most important is, that the layout and memory interface should run stable and from the beginning. There's not much time for error investigations and redesigns.

Spartan 3E Starter Kit uses a 16bit Wide DDR SDRAM Memory. But I read here and in some other boards, that people have much trouble with this one. Is this because Spartan 3E and the given IP Cores have always Trouble with DDR, or because of the missing clock feedback path on the board?

Another option would be normal SDRAM Memory. I think this should give less trouble. But here I'm wondering that Xilinx doesn't mention the Spartan 3E in the Device Family Support List of the OPB SDRAM Controller and the MultiChannel OPB SDRAM Controller. Only Spartan 3 and 3A are supported according to the Links on this page:

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In fact the Spartan 3E is only listed in the support list for the OPB DDR SDRAM Controller. Are there mistakes in this list, or is spartan 3e really not supported by most memory controllers?

Greetings Matthias

Reply to
Matthias Einwag
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Consider the NOR Flash attached to the Spartan-3E starter kit's FPGA.

Reply to
John_H

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If they have enough bandwidth for your application, psuedo srams are very simple to use. I have used this part:

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with the Xilinx opb_emc on a Virtex-4 part, and it just worked the first time. This is an 8 MB part, and they have bigger ones. Micron also provides simulation models for it. It has been in stock every time I have bought it, and best of all it comes in a manufacturing friendly BGA package so that you do not have to worry about bending any pins. Anvnet and Digikey both carry it. Their web sites do not list it as in stock, but I just bought some from Avnet and they shipped it within a few days.

Regards,

John McCaskill

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Reply to
John McCaskill

Your bandwidth requirement is less than 800kB/s. How about compact flash or an SD-card? These are well known and there are loads of resources available on the internet.

There are no free _usefull_ cores to control DDR memory.

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Reply to nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel

Hi, thanks for your answer at first

Flash is no option, because I write an read the data streams, and this should also be possible 24/7, where Flash would die fast. It will be a kind of mixer application (with the possibilty for delay on each channel), where incoming and outgoing audio streams are using a rather complex bus system. I want the Microblaze to handle the higher level bus protocols, store the data in RAM and load the mixed stream after the delay and give it back on the bus system. Because the Microblaze should also run of this RAM (I will have SPI Flash attached as FPGA Configuration and Microblaze Program Storage, but I think it's too slow to run the program directly out of it), the bandwith memory is higher than 800kB/s. But I have no experience how fast the memory should be for a good Microblaze performance.

So Xilinx OPB DDR Interface is not useful? At the moment SDRAM is my favourite. But I'm still not sure if Xilinx SDRAM Interfaces work with Spartan 3E :(

Reply to
Matthias Einwag

Hi John,

I had a look on the CellularRAM too. It really looks easy to use and price is ok. However I'm not sure if the bandwith is sufficient for me. The 85ms Access Time looks slow in Comparison to the various DRAMs. But as I understand it's faster in Burst Mode. But as I understand the EMC Controller handles it only as normal SRAM, without using the extended Features.

Reply to
Matthias Einwag

I ended up with rolling my own DDR interface for a Spartan3. IIRC the Spartan 3E is a bit slower than the Spartan3. The Spartan3 speedgrade

4 just manages to interface with DDR memory at 100MHz (the memory itself needs to meet 133MHz timing). However, most DDR (and I suppose also SDRAM) memory can be run at 83MHz as well.

I think builbing an SDRAM implementation at 83MHz is very feasable using 2 clocks (one 'normal' and one with a 90 degree phase shift).

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Reply to nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel

Any Dynamic RAM interface is going to be tricky because of opening and close rows, refresh cycles, etc.. etc....

No matter what you do, you're going to have to dive deep into the code to get it working, even if you get a canned interface.

Use a simple synchronous SRAM... it will probably interface with very little logic aside from the I/O ports of the microblaze.

You say "fast enough to let the microblaze run at a decent speed". Presumably, you're not stor> Hi everyone,

page:

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Reply to
Paul

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