Field-Programmable Gate Arrays

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constraints for design-generated clock

Hi, I am designing a memory controller for a Micron CellularRam and would like to ask what is the best way to generate...
0 comments posted 19yrs
posted by gyelod
0 comments posted 19yrs posted by gyelod

Problem cascading 2 DCMs

Hi everyone, I have a problem that is bugging me for 2 days now and I was hoping someone here might be able to help me...
21 comments posted 19yrs
posted by Michael.Niegl
21 comments posted 19yrs posted by Michael.Niegl

chip to chip high speed interconnet bus

Hi,everyone,now i want to know how can i change the high speed data between 2 chips=A3=A8one from lattice scm and one f...
0 comments posted 19yrs
posted by bjzhangwn
0 comments posted 19yrs posted by bjzhangwn

a question about DDFS

Hi, I am implementing a direct digital frequency synthesizer in FPGA. It follows the equation Fo = N * Fs / (2^M) The i...
2 comments posted 19yrs
posted by fpga002006
2 comments posted 19yrs posted by fpga002006

Prope timing constraint for this pin?

Hi. I'm working on a V4 project, but I struggle with the timing constraints. The design has one 125MHz oscillator. In a...
0 comments posted 19yrs
posted by jetmarc
0 comments posted 19yrs posted by jetmarc

one extra slipway board from fccm

Hey all, I still have one more slipway board left over to give away; email me if you want it and I'll mail it to you. I...
3 comments posted 19yrs
posted by megacz
3 comments posted 19yrs posted by megacz

N00b question about DCM

I have a Spartan3E Starter Kit, and I am trying to figure out how to use the DCM to double the freq from 50MHz to 100MH...
2 comments posted 19yrs
posted by bob3635x
2 comments posted 19yrs posted by bob3635x

Quartus Fitter Seed Setting

Hello, can anyone comment on setting the "Seed" value in the Fitter group under Setting? How does increasing the value p...
2 comments posted 19yrs
posted by jjlindula
2 comments posted 19yrs posted by jjlindula

Question about the simulation library in Xilinx EDK

When I used the EDK simulation library wizard, it never succeeded. So I have to compile the ISE libaray manually under...
0 comments posted 19yrs
posted by pang.dudu.pang
0 comments posted 19yrs posted by pang.dudu.pang

Question about the simulation library in EDK

When I used the EDK simulation library wizard, it never succeeded. So I have to compile the ISE libaray manually under...
6 comments posted 19yrs
posted by pang.dudu.pang
6 comments posted 19yrs posted by pang.dudu.pang

Sscanf replacement for xilinx EDK

Dear All, Does anyone know of a replacement for the standard C sscanf() function? I need to use this function, but it t...
4 comments posted 19yrs
posted by jmariano65
4 comments posted 19yrs posted by jmariano65