Latest threads in Field-Programmable Gate Arrays

baud_generator (16x baud) used in UART transmitter logic

For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in tran...

3 9yrs

feiphung27

3 9yrs feiphung27

ZAP : An open source ARM processor (feedback)

Hi, I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T com...

15 9yrs

revanth91kamaraj

15 9yrs revanth91kamaraj

fpga zigbee interface

i have spartan6 atlys(LX45) board, can anyone suggest me how to interface zigbee to this board to communicate with pc.th...

2 9yrs

srirameee09

2 9yrs srirameee09

Accelerating Face Detection on Zynq-7020 Using High Level Synthesis

Hello, here is my question: Purpose: realize face detection on zynq-7020 SoC Platform: Zedboard with OV5640 camera Comp...

6 9yrs

heyuning20

6 9yrs heyuning20

Spartan 6 Digital controlled oscillator

Hello, What is the best way to implement a 30 MHz clock generation circuit that can be dynamically controlled to provid...

2 9yrs

jontravel24816

2 9yrs jontravel24816

Test Driven Design?

Anyone doing any test driven design for FPGA work? I've gone over to doing it almost universally for C++ development, b...

47 9yrs

tim

47 9yrs tim

Configuration fault recovery

Hi all, I've been thinking about this problem for a while and shared it with a few colleagues, but no one has yet to co...

4 9yrs

yan.lamarre

4 9yrs yan.lamarre

Pipelining on Multiple Clock Edges

I recall a processor implementation where the guy tried to say that one particular part of the pipeline design had a re...

8 9yrs

gnuarm

8 9yrs gnuarm

size lattice iCE40 config files

Hi all, I am working on a STM32-based programmer for the olimex iCE40HX1K-EVB fpga dev.board. (now trying to implement...

2 9yrs

kristoff

2 9yrs kristoff

increment or decrement one of 16, 16-bit registers

I've been geeking out on the COSMAC 1802 lately -- it was the first processor that I owned all just for me, and that I...

22 9yrs

seemywebsite

22 9yrs seemywebsite

Lattice iCE40 UltraLite DIPSY - what happened?

I was digging around for info on the iCE40 UL and found info on the DIPSY from 2015 when it was breaking news. Not sure...

6 9yrs

gnuarm

6 9yrs gnuarm

When I'm Wrong I'd Like to Know

But each topic I'm wrong about should be addressed in that newsgroup. If I were wrong about something related to FPGAs...

1 9yrs

gnuarm

1 9yrs gnuarm

POLL: Would you want to know?

I have said previously I would not post in this group about Jesus any longer. But I fear I have sinned against God in m...

8 9yrs

rick.c.hodgin

8 9yrs rick.c.hodgin

creating a seed on a FPGA.

Hi, I am aware that the best way to create a seed (for random numbers) is external hardware, but does anybody know any c...

6 9yrs

kristoff

6 9yrs kristoff

Lattice ECP5 succesor ( with DDR4 phy) ?

AFAIK ECP5 is good for interfacing with DDR3, but not DDR4. Is there a plan to introduce new members with DDR4 or perhap...

4 9yrs

brankob

4 9yrs brankob

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