Field-Programmable Gate Arrays

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FPGA IO Pin Unwanted Coupling

Hello, I am fairly new to FPGA design and have a Xilinx Spartan 3 board, that has a 50 pin IO bank. When I load up a de...
2 comments posted 18yrs
posted by WyndyPickle
2 comments posted 18yrs posted by WyndyPickle

Simulate Microblaze in System Generator

Hi. I've spent hours trying to find a simple example/turorial of a microblaze imorted into system generater for simulat...
0 comments posted 18yrs
posted by klauspetersen
0 comments posted 18yrs posted by klauspetersen

Old Mits Dram Datasheet Search

Hi- I'm trying to locate the data sheet for an old 1M x 1 Mitsubishi dram part: MSM41000BJ (70nS) An internet search is...
1 comments posted 18yrs
posted by jflan
1 comments posted 18yrs posted by jflan

CPLD beginner questions

I'm currently using GALs (16V8-18V8-22V10), but my current board requires 4 GALs and I would like to replace them with...
9 comments posted 18yrs
posted by aleksaZR
9 comments posted 18yrs posted by aleksaZR

export to project naigator

I am running some xmp file provided by the manufacturer. The flow for generating bit file was smooth using 7.1 and 8.1...
1 comments posted 18yrs
posted by nbg2006
1 comments posted 18yrs posted by nbg2006

chipscope analyzer error

I get the following error with chipscope analyzer whenever I do the intialize chain. ERROR: Socket Open Failed. localho...
6 comments posted 18yrs
posted by nbg2006
6 comments posted 18yrs posted by nbg2006

Xilinx EDK - LibGen Error!!!

hi all.... i use xilinx EDK 9.1i. i'm trying to use opb EMAC.... when i run libgen i get this error: "Running system le...
0 comments posted 18yrs
posted by vikram788
0 comments posted 18yrs posted by vikram788

PLB master : Split bus architecture

Hi, There are three sources for plb master interface. 1) plb_master_single.vhd and plb_master_burst.vhd use a combined...
0 comments posted 18yrs
posted by tejaswyh
0 comments posted 18yrs posted by tejaswyh

DISABLING POWERPC IN VIRTEXII PRO

I have AMIRIX ap1070 board with a xilinx virtex II PRO XC2VP70 . I am trying to use it for network based application ....
2 comments posted 18yrs
posted by nbg2006
2 comments posted 18yrs posted by nbg2006

New Home

Hi, Well, since the Xilinx functional re-organization, I have a new responsibility (here at Xilinx). The bad news(?): I...
3 comments posted 18yrs
posted by austin
3 comments posted 18yrs posted by austin

Ryhmän sfnet.tori.veneily virallinen kuvaus

*Yleisön pyynnöstä alan julkaisemaan Suomen ydinaavikoitumisen nykytilastamme kertovaa faktaa. M.T.05.05-08. Ilmatietee...
0 comments posted 18yrs
posted by henri.lundberg
0 comments posted 18yrs posted by henri.lundberg

Dram Refresh Controller Tutorial wanted

Hi... I have a desire to interface some dram to a project and was internet searching for some in depth tutorials on ref...
1 comments posted 18yrs
posted by jflan
1 comments posted 18yrs posted by jflan