I have AMIRIX ap1070 board with a xilinx virtex II PRO XC2VP70 . I am trying to use it for network based application . I am not using the powerpc at all and was wondering if there is a way to disable the powerpcs and the plb/opb buses on the chip. There is a pci bridge from tundra on board which helps in pci communication with the host. I dont knwo if I would be able to configure it using the host drivers and then use my ip cores exclusively with no powerpc and linux running on the fpga. Right now I am just trying to do a workaround by not fiddling with the base design and just adding my ip passively into the design containing the poweprc plb/opb structure. The manufacturer has a u-boot code on a flash which gets loaded into the SDRAM on board which is used to initializing and assigning the address space. I have o figure out a way to assign the address space using the host instead but before that I wanted to know if there is away to remove the powerpcs from the design. Thanks D

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The Virtex 2 Pro is a FPGA.

The 405PPC core is programmable. Instantiate it in your design, and you use it.

Don't instantiate it in your design, and it is unused.

It is your choice in your VHDL or verilog before it is placed routed, and the bitstream created.

Once you have a bitstream, you need to go back, and redesign for what you actually want.

Or, you can create another bitstream, and load that one in after the first one (use reconfiguration to do task 1, followed by task 2).

The 405PPC core in in the silicon, so you can not "take it out." All you are able to do is to either include it in your design, or exlude it from your design: your choice.


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Thanks Austin.

My confusion now is how to initialize the pci bridge in between the fpga and the pci. AMIRIX provided me with an uboot image which was run by the powerpc . I want to try to implement the design without the powerpc and hence will have to initialize the pci bridge without the powerpc runnng from the host.

aust> ni,

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