I am trying to port my VHDL design code into System Generator "Black Box" with some I/O Buffer instatiated, which is LVDS pad. Where I run through a compilation, the following error appeared:
ERROR:NgdBuild:455 - logical net 'hwcosimtoplevel/memory_map/ int_mm_dataina_p_b(4)' has multiple driver(s): pin Q on block hwcosimtoplevel/memory_map/int_mm_dataina_p_b_4 with type FDE, pin PAD on block hwcosimtoplevel/memory_map/int_mm_dataina_p_b(4) with type PAD
ERROR:NgdBuild:924 - input pad net 'hwcosimtoplevel/memory_map/ int_mm_dataina_p_b(4)' is driving non-buffer primitives: pin Q on block hwcosimtoplevel/memory_map/int_mm_dataina_p_b_4 with type FDE
Anyone have idea about the error? I do not know whether is it caused by the tool that reinstantiate the I/O buffer again to the I/O I have instatiated the buffer. If so, anyone have idea to disable it selectively in the system generator environement.