EDK IPCore insertion

Hallo At al

I try to implement a IPCore in my EDK Design but without attachment o

any bus. My IP Core have some IOs and there are two important inputs too. That is Clock and Reset. Ok, when i try to connect the syste clock, which comes from DCM output, with my IP Core Clock input, get a error by generating bitsream

The Error is

ERROR:NgdBuild:455 - logical net 'fpga_0_SDRAM_8Mx32_SDRAM_Clk' ha

multipl drivers. The possible drivers causing this are pin PAD on bloc plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/fpga_0_SDRAM_8Mx32_SDRAM_C k with type PAD pin O on block dcm_0/dcm_0/CLK0_BUFG_INST with type BUF ERROR:NgdBuild:462 - input pad net 'fpga_0_SDRAM_8Mx32_SDRAM_Clk drive multiple buffers. Possible pins causing this are: pin I on block obuf_56 with type OBUF pin I on block myasimonfi/myasimonfi/USER_LOGIC_I/OBUF_inst_cl with typ OBUF pin I on block myasimonhw/myasimonhw/IBUF_inst with type IBU ERROR:NgdBuild:466 - input pad net 'fpga_0_SDRAM_8Mx32_SDRAM_Clk' ha illega connection. Possible pins causing this are pin C on block reset_block/reset_block/EXT_LPF/lpf_int with typ FDS pin C on block reset_block/reset_block/Rstc405resetcore with typ FDS pin C on block reset_block/reset_block/Peripheral_Reset_0 wit type FD pin C on block reset_block/reset_block/core_cnt_en with type FD pin C on block reset_block/reset_block/Bus_Struct_Reset_0 wit type FD pin C on block reset_block/reset_block/Core_Reset_Req_d3 wit type FD pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_0 wit type FD pin C on block reset_block/reset_block/Rstc405resetchip with typ FDS pin C on block reset_block/reset_block/Rstc405resetsys with typ FD pin C on block reset_block/reset_block/Core_Reset_Req_d1 wit type FD pin C on block reset_block/reset_block/Core_Reset_Req_d2 wit type FD pin C on block reset_block/reset_block/CORE_RESET/q_int_3 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_0 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_1 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_2 wit type FDRE pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_3 wit type FD pin C on block reset_block/reset_block/core_req_edge with typ FDS pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_1 wit type FD pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_2 wit type FD pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_1 wit type F ERROR:NgdBuild:466 - input pad net 'fpga_0_SDRAM_8Mx32_SDRAM_Clk' ha illega connection. Possible pins causing this are pin C on block reset_block/reset_block/EXT_LPF/lpf_int with typ FDS pin C on block reset_block/reset_block/Rstc405resetcore with typ FDS pin C on block reset_block/reset_block/Peripheral_Reset_0 wit type FD pin C on block reset_block/reset_block/core_cnt_en with type FD pin C on block reset_block/reset_block/Bus_Struct_Reset_0 wit type FD pin C on block reset_block/reset_block/Core_Reset_Req_d3 wit type FD pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_0 wit type FD pin C on block reset_block/reset_block/Rstc405resetchip with typ FDS pin C on block reset_block/reset_block/Rstc405resetsys with typ FD pin C on block reset_block/reset_block/Core_Reset_Req_d1 wit type FD pin C on block reset_block/reset_block/Core_Reset_Req_d2 wit type FD pin C on block reset_block/reset_block/CORE_RESET/q_int_3 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_0 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_1 wit type FDRE pin C on block reset_block/reset_block/CORE_RESET/q_int_2 wit type FDRE pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_3 wit type FD pin C on block reset_block/reset_block/core_req_edge with typ FDS pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_1 wit type FD, pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_2 with type FD, pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_1 with type FD

Hade some the same proble?

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