Hi,
I'm trying to add an IP(FFT), generated by Coregen, to an EDK project.
I have created a new custom IP in EDK and added the vhdl code of FFT int user_logic.vhd file, and imported it to the EDK project, but I got thre errors:
ERROR:NgdBuild:604 - logical block 'fft_ip_0/fft_ip_0/USER_LOGIC_I/fft/U3 with type 'fft128' could not be resolved. A pin name misspelling can caus this, a missing edif or ngc file, or the misspelling of a type name Symbol 'fft128' is not supported in target 'virtex2p'. ERROR:NgdBuild:455 - logical net 'plb_bram_if_cntlr_1_port_BRAM_Clk' has multiple driver(s): pin PAD on bloc plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_port_BRAM_Cl with type PAD, pin O on block dcm_0/dcm_0/CLK0_BUFG_INST with type BUFG ERROR:NgdBuild:924 - input pad net 'plb_bram_if_cntlr_1_port_BRAM_Clk' is driving non-buffer primitives: pin C on block reset_block/reset_block/core_cnt_en with type FD, pin C on block reset_block/reset_block/Bus_Struct_Reset_0 with typ FD, pin C on block reset_block/reset_block/Rstc405resetchip with typ FD, pin C on block reset_block/reset_block/Peripheral_Reset_0 with typ FD, pin C on block reset_block/reset_block/Rstc405resetsys with type FD, pin C on block reset_block/reset_block/Core_Reset_Req_d3 with typ FD, pin C on block reset_block/reset_block/CORE_RESET/q_int_0 with typ FDRE, pin C on block reset_block/reset_block/CORE_RESET/q_int_1 with typ FDRE, pin C on block reset_block/reset_block/CORE_RESET/q_int_2 with typ FDRE, pin C on block reset_block/reset_block/CORE_RESET/q_int_3 with typ FDRE, pin C on block reset_block/reset_block/Core_Reset_Req_d2 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/lpf_exr with typ FDSE, pin C on block reset_block/reset_block/EXT_LPF/lpf_asr with typ FDSE, pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_1 with type FD, pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_1 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_2 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_2 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/asr_lpf_3 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_3 with typ FD, pin C on block reset_block/reset_block/EXT_LPF/exr_lpf_0 with typ FD
NGDBUILD Design Results Summary: Number of errors: 3 Number of warnings: 77
I don't know what exactly these errors mean. Can anyone help to resolv these problems?