Running prog from PROM

Hi,

I would like to know how we can store a program in the on-board PROMs. My CORE takes up 36 out of the 44 available BRAMs. By the way, I would want to mention a couple more of things.

  1. I use a Virtex2Pro board and this design uses the PowerPC
  2. I dont have a CF reader / ACE CF Reader
  3. It has 2 Xilinx Flash PROMs -- This is what I want to use.
  4. I have 32MB SDRAM available.

Thank you, Joey

Reply to
Joey
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Have a look at this application note

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which is a similar application for MicroBlaze.

John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.

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Reply to
John Adair

Hi Joey,

if your programm don't fit in the BRAMs (i think you have plb/opb BRAM in your PPC design) you have a problem. It sounds like you use a Memex Eval board. Is this right?

Best regards,

Michael

Reply to
Michael Bodenbach

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we are testing ISE 7.1 for 'spartan-3E readiness'

in SP3 the support is slighlty better, now 500e is also recognized in JTAG chain, but there still isnt full support for the all family. The testing is done by using 'emulated' JTAG chain, - all the 7 Xilinx FPGA's are actually living inside one S3-1500 the JTAG IDcodes are correct as ChipScope recognized them, so it must be the problem# of impact 7.1 SP3

what means that for full S3E SP4 is possible needed

Antti

Reply to
Antti Lukats

uups replied instead of making a new post :(

"Antti Lukats" schrieb im Newsbeitrag news:dalk2v$f9a$02$ snipped-for-privacy@news.t-online.com...

by

inside

the

uups replied instead of making a new post :(

Reply to
Antti Lukats

Hey Michael, you are great !! IT IS a Memec Eval board and my prog is defenitely much bigger than what 8 BRAM blocks could ever hold. Are you saying that there is no other possibility, other than running it with a debugger. Well thats all I know (I give in that I am new in this field :( )

Joey

Reply to
Joey

Joey schrieb:

Hi Joey,

what type of board do yopu have. Can you send me you design? With Memec boards it isn't possible to store or read user data from PROMs, cause the CE pin of the PROM are connected to the DONE pin.

Best regards,

Michael

Reply to
m.bodenbach

Thank you guys. You are right !! The Flash CE pin of the board is connected to the FPGA DONE pin. So in my case, there is no possibility other than bringing the program to the BRAMs.

schrieb im Newsbeitrag news: snipped-for-privacy@g47g2000cwa.googlegroups.com...

:( )

Reply to
Joey

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