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running microblaze from bram through OPB-bus

Hi,

We have a design with a microblaze which runs from bram at startup (connected through the LMB bus). After startup it is possible to download an application to sdram (connected through the OPB bus) and run from sdram. Since we are going to change the fpga type and get a lot more brams available; we are thinking to remove the sdram (to reduce costs) and replace it by bram.

My question is: is it possible to have a microblaze with bram connected to the LMB bus and a seperate bram connected to the OPB bus and have different programs in the brams (a bootloader in de bram which is connected to the LMB bus, and an application downloaded at runtime in the bram which is connected to the OPB bus) and run both of them (not at the same time of course)?

As far as I can see, it doesn't matter what kind of memory is used for the application (bram or sdram) as long as the code is built to run from the correct addresses. Can anyone confirm this and/or has experience with this?

Thanks in advance, Frank

Reply to
Frank van Eijkelenburg
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/ /\/\ Aurelian Lazarut
\ \  / System Verification Engineer
/ /  \ Xilinx Ireland
\_\/\/
 
phone:	353 01 4032639
fax:	353 01 4640324
Reply to
Aurelian Lazarut

No problem having both LMB and OPB BRAM visible to the same processor as long as the addresses are not overlapping as indicated in the original post.

I agree that LMB is likely preferred if the Microblaze is the only entity to access the memory space. OPB BRAM might be needed if other peripherals require access to the memory such as a DMA engine.

Paul

Aurelian Lazarut wrote:

Reply to
Paul Hartke

Thanks for the answers. So it shouldn't give any problems.

I assume that having only the LMB bus, will still allow me to divide the code into a bootloader and application part. And to download the application into a reserved address range in the BRAM?!

Frank

Reply to
Frank van Eijkelenburg

Reply to
Paul Hartke

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