Hi all, bitgen program in ISE can generate configuration bitstream that downloaded to the FPGA. In contrast, configuration bitstream, the currrent state of the registers in FPGA can also be readback. Create readback bitstream file by command line bitgen -w -l -m -g readback -g persist:X8... from application note XAPP176. So
In "Project Navigator" in the "Generate Bitstream"-process options, you have to activate the options "Create ASCII Configuration File" ("General Options" tab) and "Create Readback Data Files" ("Readback Options" tab), only then the .RBA is generated.
If you call bitgen from the command line, you have to add these options:
-b -g Readback
The documentation is wrong there (at least the doc for ISE5.2), as it states that it is enough to use the "-g Readback" option to generate the file.
cu, Sean
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