I have generated a .bit file and try to program xc2v3000 FPGA but through impact gives a message that checking done pin.............done pin do not high , program terminated. so i verify operation in impact and impact gives a error message that top_design.msk does not exist . my qustion is where .msk file will be generated and is it really needed during programming FPGAs. i checked all other probable error possibilities , so please give comment.
programming virtex2 FPGA
Jun 13, 2007
4 Replies
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search comp.arch.fpga HTH, Syms.
J.Ram,
You have selected to do a verify in iMPACT after configuration. This is why iMPACT is looking for the .msk file. You have two options here. Either deselect the verify operation or have Bitgen create the mask file for you when you generate the bitstream. Look to the Bitgen documentation on using the -m switch for this:
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-David
this:
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Thanx david, give comment on why done pin do not go high.
J.Ram,
There are numerous reasons on why DONE will not go high. If this is happening while you have verify selected and still have not generated a .msk file, then I might expect this. If you have deselected the verify option and DONE is still not going high, then it is time to start debugging. May I recommend the configuration debugger on the Xilinx Web site for starters.
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This is a comprehensive step-by-step guide that will start at the common pitfalls and work its way to more complex issues. Go through this and let me know how things progress.
-David
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