question for the EDK users out there...

DCR bus stands for device control register bus. It can be used to control devices. In EDK the PLB2OPB, the OPB2PLB and the INTC have a DCR interface (the INTC is also available as an OPB version). The PPC has a native DCR master interface while the MB does not have a DCR interface at all, however, there is an OPB2DCR bridge.

The DCR is a very simple bus. It is not high-performance and really intended to be used for control operations.

To learn more about the DCR interface have a look at the PowerPC Processor Block Manual [pg. 100ff]

- Peter

me snipped-for-privacy@walla.co.il wrote:

Thanks Peter, So if I understand you correctly, the DCR is to be used mainly in PPC designs and not in MB. I have another question if possible - I would like to know if it is possible to debug a MB design with both sw debug (MDM) and hw debug (chipscope), the reason for this question is that both of this modules are working via JTAG. Thanks in advance, Mordehay.

Yes, they can work together. You can even do tricky stuff like connect the chipscope and MDM triggers together, so that you get a bus trace of the previous NN cycles prior to a CPU trap, that sort of thing.

Unfortunately it doesn't work in V4 ES (early silicon) parts due to a silicon bug. I assume it was fixed for production silicon.

John

Hi John, Thanks for the answer, is there anywhere where I can get a reference design or appnote that describes such a design (CS + MDM) ? Thanks, Mordehay.

Hi Mordehay:

Go to

On the lower right, under documentation, select the Embedded Design Examples. In the table of examples, you will find MB - ChipScope Design.

-Greg

me snipped-for-privacy@walla.co.il wrote:

That was only a problem for very very early LX silicon and has been fixed for quite some time now.

- Peter

We bought 20 ML401 boards in early 2005, and I believe all of them are affected :(

John