Dear EDK experts,
Here I am again with an EDK problem... I have a top level ISE design and an EDK submodule (PPC). I am trying to bring a DCR bus out from the EDK submodule into the top level ISE design. Since I want this bus to be in the normal address space I added the opb2dcr_bridge to my design. I assigned the DCR master side of bridge to the external ports of the EDK submodule. All of this seems fine, but it doesn't work... I can't see any activity on the DCR bus when looking with the Chipscope except for I know that the clock is present... What am I missing?
One thing I noticed is that in the Bus Interface View the bridge shows as not connected on the DCR master side... I tried adding a DCR bus, connecting the bridge to it and bringing this bus to external ports instead of the bridge's pins directly, however the EDK then would complain that there were no slaves on that bus... The only connections it would allow to that bus in the Bus Interface View are to the ppc405_0 and, I believe, plb2opb_bridge_0...
Has anyone been through this?
Thanks, /Mikhail