Hi all, my question is as follows, I am now going through a ppc design that I would like to run as follows : I need to use a internal BRAM for boot sequence and a NAND FLASH to contain all the code. the code will be placed and run on external SRAM. My question are as follows:
1) what should I choose as internal BRAM IF OCM or PLB_CTLR ? 2) Are there any better ways to design such a system ? Thanks in advance, Mordehay?Another try for an answer, anyone please :-) .....?
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doesnt really matter
what is your question? if NAND is the cheapest NV memory ? or what?
if you need more than 8MB of NV memory then NAND is a good choice
Antti
To your first question:
If I understand correctly OCM runs at the CPU clock and thus anything you put on that bus will affect the max achievable CPU speed, at least that's the impression I got when I actually tried implementing some big OCM memory... I believe most of the designs use PLB_BRAM controllers...
/Mikhail
OCM runs at an N:1 ratio of the CPU clock where N={1,2,3,..[see OCM docs for max. divider]} and, with that, does not affect the maximum CPU frequency.
- Peter
MM wrote:
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