Hello,
I am trying to transform a functional behavioral description of a controller module to real hardware in a Cyclone device(EP1C6C256C7).
The VHDL model of the controller is responsible for the control of the write and read transactions to a data field (two-dimensional array) which could be for example a SRAM block.
The problem is that the write- and read- addresses and the
-next-addresses of the SRAM are calculated in smaller subarrays which also have a two dimensional structure. However these sub-arrays are too large to be exclusively synthesized in logical ressources of the FPGA. So doubtless the memory bits in the Cyclone device which are available in form of RAM, ROM, FIFOs have to be used in order to afford the synthesis.
The problem is how to split the behavioral description into submodules to achieve the same functionality on the one hand and to use the memory bits on the other hand. An essential question is where and how to place the control logic cleverly.
Maybe someone has some good or basic idea. I would be grateful for any suggestion.
Some examplary VHDL code of the functional description of the module. The signal row_write represents the current blocknumber of the SRAM-block and is gathered from a fifo which comprises blocknumbers from 0 to 255. (tb_data_out) The SRAM-block is described as if being whithin the file controller. The question here is how to "detach" or to split this array and the other sub-arrays.
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---------------------------------------------------------------------- generic( ROW_ADDR_BITS: integer:= 8; ROWS : integer:= 256; COL_ADDR_BITS: integer:= 3; COLS : integer:= 8 );
type t_matri is array (0 to COLS*ROWS-1) of std_logic_vector(7 downto
0); signal data : t_matri; type t_addr is array (0 to ROWS-1) of std_logic_vector(ROW_ADDR_BITS-1 downto 0); signal next_addr : t_addr;type t_col is array (0 to ROWS-1) of std_logic_vector(COL_ADDR_BITS-1 downto 0); signal last_col : t_col;
signal row_write : integer range 0 to 255;
begin . . . if (write='1' and writing='0' and lsfull='0') then if tb_empty='0' then row_write