Hi- I have a project in which I imported an EDK instantiated processor core- and have a whole bunch of logic around it.
For my initial build- this all worked well. The processor core was all EDK generated (NGC files I think), and I used synplify to synthesize my system_stub and user logic.
For the final build- I had to switch to importing my user logic as an EDF file from Synplify because I used a embedded core which uses a library- and ise doesn't pass that information to Synplify properly (acccording to user app notes).
The problem is in the initial build- under mapping properties- I get a whole slew of options- "Perform Time driven packing and placement" down to other map line options. (Solaris version 6.2.03i) In the final build- I see a much smaller subset of these options- "Perform time driven packing and placement" is not one of them. I had to use this option to meet my timing.
Anybody have any clue as to why these options would be gone? The fact that I am using a EDF for most of my RTL (top is still VHDL structural code)- shouldn't make any difference in the back end I wouldn't think?! Any ideas appreciated....
WP