PLB/OPB Bus Access from ISE

Is there an easy way to access the PLB or OPB buses from XIlinx ISE without going through the PowerPC and EDK? I am using the XUP Virtex II Pro Development Board and want to read/write from DDR RAM in ISE rather then EDK for speed reasons. So I need to access the PLB/OPB buses from ISE which are connected to the DDR RAM.



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If you think of the EDK as a way to create a bussed architecture, you can do this within the EDK by using a custom peripheral.

Use the EDK to instantiate: PLB PLB_DDR IP Core

Connect the PLB to to the PLB_DDR IP core.

Then use the Create Peripheral Wizard to generate templates for a custom peripheral. Create your custom logic, and setup your peripheral to DMA the data to the memory. Import the peripheral into the EDK, and hope it works.

However, if the only reason you want the PLB is for the DDR controller, and you really want speed, why not use the Memory Interface Generator?

If you want to share data with a processor, it may be easier to use block rams.

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