Hi, I'm using ise 6.1 to write, synthesise and implement my designs. I'm now trying to use synplify to synthesize without leaving the ise gui. Everything works fine, except that xilinx doesn't seem to pass the .ucf file with my pin assignments to synplify. The resulting .edf file doesn't have any constraints associatted with it, and ise cannot use the .ucf with the .edf. Is it possible to still use the xilinx constraints editor to generate the .ucf, or I absolutely need to open synplify and recreate all my constraints in their scope editor?
Rgds, David