Help with webpack/ISE 8.2

Hi,

I could use a bit of help with Webpack/ISE 8.2 from Xilinx. I am learning Verilog by constructing a small project in it, in fact an 8080 CPU core.

I have completed the project, and am debugging it, but I can't seem to get the ISE 8.2 simulator to display signal traces down inside the module instantiations. After searches on this group's old messages, I gather that in older versions, 7.x and back, this was simply a matter of right clicking the signal in the signal names list and choosing the "add to wave" option. However, this does not appear to exist for 8.2, or was changed. I guess it is possible that the free webpack does not have that capability, but the Xilinx website seems to claim that the free version of the simulator "modelsim" is not limited in an way but speed.

Right now, the only way I appear to have to get signals out to the waveform pane is by routing them out to pins on my testbench, a tedious procedure at best.

Thanks in advance,

Scott Moore

Reply to
scott moore
Loading thread data ...

Hi Scott - I am assuming that this is a version of modelsim XE that is supplied. If so in the command window type : view struct Then type : view sig The structure window has a top down view of design. By selecting the desired level in structure, all regs/wires for that level are displayed in the signal window. Select wires/regs and drag drop to waveform window. (You can display this via "view wave" in command window).

--
Regards,
John Retta
 Click to see the full signature
Reply to
John Retta

Not actually sure what simulator I am using. The choice when I created the project calls it "ISE simulator".

I was doing several things wrong, or laboring under a few misconceptions. I found that you can drag and drop signals from the "hierarchy" window to the waveform window. My principle problem was that I didn't know that if you highlighted the testbench in the sources window, it simulates without stimulus, and found out you have to have the .tbw (testbench waveform) file highlighted.

Now the commands you were giving, I presume that these need to be given to the "sim console", which appears to be running TCL. In short, it does not appear to know the "view" command, but it has "show" and many other commands, so this may again point out that I am not running "modelsim" as I thought, sorry.

Anyways, I am off and running today, and in fact got a lot of work done getting my project running. I'll learn more about these direct commands, some of them look quite useful, like the "show load" to show nets driven by a signal.

Thanks again.

Scott Moore

Reply to
scott moore

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.