Without EasyPath any production device with any known defect (that is not covered by an errata note) goes into the garbage can. That has been and will remain our policy, and I assume the policy of any reputable IC manufacturer.
EasyPath allows us to test only the relevant subset of the chip's functionality (as needed by the specific user). This increases yield for large devices significantly (hardly any gain for small chips), and that higher yield means lower cost to us, and supports a lower selling price. This should be understandable to anybody with a high-school education. Peter Alfke
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Jim Granville
Hmm - you mean grey market parts, like plagued Intel ?
Q: How are these parts labeled, that would be one obvious difference ?
Tho that, of course, will not stop the truly dishonest....
-jg
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fpga_toys
hmmm just like putting a yellow sticker on $10m of perfectly good parts, and calling them lemons to justify a sale below cost?
I think anybody with a high school education can figure that one out too.
It also seems like a perfectly good scam for your production department to take perfectly good tested parts, and ship them under the easypath program for a huge kickback. How can you montor employee fraud with such a dual labeling program with 80% discounts?
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Peter Alfke
Are we continuing this thread until John (aka Mr Toy) has made a complete fool of himself ? His ranting is neither coherent nor entertaining or amusing anymore. Peter Alfke
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Austin Lesea
OK,
I agree.
I'm off to doing more useful things.
Aust> Are we continuing this thread until John (aka Mr Toy) has made a
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rickman
There is margin and there is ROI (return on investment). In a business that is capital intensive, ROI is as important, if not more important than margin. The fact that Xilinx is fabless does not change the distinction. Your vendor will not charge the same per wafer if you are buying half as many wafers. So in reality doubling the yield will not cut your costs in half.
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John_H
So go to college. Specifically, pursue engineering economics or general economics coursework.
There is so much more out ther in life than ones own little world. Explore it.
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fpga_toys
Ahh ... an oldie moldie zero defect equals quality bigot. I thought all those either retired or got laid off in hard times.
I can remember that same mantra in several industries, that all have found that selling defect managment and a profitable seconds line is the very key to improving sales and getting a better ROI for investors. I remember the 1980's when the disk drive industry was going thru that too. Just try and buy a half million zero defect drives today.
Maybe some stock holders aught to be asking your board why you are so eager to crush into the can near perfect dies and packaged parts for a single (or small number) of flaws that might easily bring another
10-50% in sales into users perfectly willing to purchase parts with classified flaws they can design around.
I'm perfectly willing to design reconfigurable computers with a few routing and LUT failures that we can map around with a defect list keepaway table. I'd be even happy to get them as bare, but mountable die.
Anybody else here that would be willing to purchase high end FPGA's for reconfigurable computing with a few minor flaws? Since they are trash to you, can I get several thousand XC4VLX200's at say a 90-95% discount? hmm ... maybe that's to low an offer, and there is a bidding war ready to errupt.
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John_H
Hell no.
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fpga_toys
Ahh Peter .... you always run away shouting insults just when it's getting fun.
You haven't explained yet why throwing millions of dollars into the trash can provides your stock holders the best possible ROI for money spent on usable silicon with a very viable secondardy market willing to do defect management?
In every other industry that's faced valuable high defect product decisions, the've tossed the zero defect bitots out, to push up the bottom line. Hopefully even Xilinx will reach the point that the zero defect incompetents are no longer supportable or promotable. Anything that increases Xilinx's sales without additional costs, can only improve the bottom line, and hopefully for customers lower the prices on other products that have had to carry the burden of the zero defect bigots waste.
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fpga_toys
Gee Wiz .... I've got to see your version of the math :) This is really going to be fun!!!
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Phil Hays
As a former semiconductor test engineer, the hard part of FPGA production testing is fairly easy to see. It is the interconnect. Everything else looks very easy. Note that the FPGA under test will be reloaded with a different design many times during test.
It seems to me that testing by loading BIST designs still makes a lot of sense. Using a BIST design, the RAMs, multipliers, LUTs and registers can be tested quickly. This is the easy part of testing a FPGA. There would be little gain in customizing these tests.
Most of the test time and cost for a standard FPGA would be needed to test interconnect. There would be a lot less (several orders of magnitude less) interconnect test time for an EasyPath part, as compared with a standard FPGA. It looks to this former semiconductor test engineer that the test cost of an EasyPath part might be between
30% and 5% of the test cost of a standard FPGA, depend on size of FPGA and lot of things that I know that I don't know.
Now add in the effect of yields. This bring me to the amusing realization that Xilinx might well have the same profit margin percentage on an EasyPath tested FPGA than on the same standard tested FPGA selling for five times as much.
While this all seems reasonable to me, I've been out of semiconductor test for more than 20 years. YYMV, SRA.
-- Phil Hays
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cs_posting
Dodging the question.
What happens to devices run through the full (general application) test program, which turn out to have single errors?
Are they retested for easy path use? or are they destroyed?
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fpga_toys
I agree Phil. The twist is that the customer can not take and use a standard set of tests built for a fully functional part, otherwise it will find and report all the untested errors creating a nightmare for the field techs to sort out false positives. For field testing, the tests really need to live inside the same set of qualified good resources, which means customizing the tests for each qualified easypath design, to stop the test from reporting errors on logic resources not used.
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fpga_toys
Gee ... I've found that playing Devils Advocate would get me paid .... how much should I be asking?
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fpga_toys
Next time you are in Longmont drop me a note, and take me to lunch :)
Maybe some face to face time will allow the petty BS to fade away.
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fpga_toys
Be sure and bring a briefcase full (about 4K) of the reject XC4VLX200 parts so I can stay busy building the next version of my home reconfigurable super computer :) That ought to keep me busy and off CAF for several months, if not a year :)
It might even give Xilinx some usable marketing collateral when I'm done, and we can talk about buying reject parts for profit afterward too!!
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Austin Lesea
John,
Just wanted to be sure you were not on their pay roll.
I have been made a fool of once before thinking I was talking to a potential customer when it was someone who was an actual competing company employee...boy did I feel stupid.
Austin
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Eric Smith
That's not a good analogy for Easypath. Ford can repair manufacturing defects at relatively low cost, compared to the total cost of the product.
Xilinx *might* be able to repair some bad dice by using FIB, but the cost of doing so would significantly exceed the original cost of the die, and although the result might be functional, it could not be guaranteed to have comparable reliability to a normal part. Thus it could not be sold except perhaps as an unqualified engineering sample.
Thus there is no motivation to do any sort of repair as part of the production process, but rather to do everything possible to increase the yield of fully functional parts. Still, for a large die, despite their best efforts there will be some parts that are not fully functional, but very nearly so (>99.999%). Unfortunately these cannot be sold as normal FPGA product.
With Easypath the customer is not informed of the specific nature of the defect(s) of the parts they receive; the parts might even be 100% functional, but are not guaranteed as such. In fact Xilinx might not even be aware of all of the defects; they have tested the part against vectors that verify that it meets all relevant specifications with regard only to the specific customer configuration bitstream.
Finally, they aren't "dumping", which would be selling below cost. They are likely making quite a tidy profit on Easypath, since although the price is lower than for a fully tested FPGA, the cost is also lower. Time on a semiconductor tester is very expensive, thus anything that reduced the test time significantly reduces the total part cost.
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Eric Smith
Where do you come up with this "below cost" idea? I don't see any evidence that supports it.
A kickback? From whom?
Presumably Xilinx employs standard manufacturing traceability procedures. It is not obvious that there is any more potential for employee theft or fraud with Easypath than with their standard products.
Why do you care? If there were some unscrupulous employees, presumably Xilinx would find and fix the problem themselves, with support from the authorities as necessary.
Why do you have an axe to grind about Easypath?
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