Rob,
Easypath is not a structured ASIC, it is an FPGA. Identical in every way to what the customer is already using. Except that we haven't tested the bits they don't use.
As for "success" of Easypath, it requires no design, no software, and no support. No R&D. Completely different business model.
So just one customer for Easypath is direct $ to the bottom line.
Obviously, we have more than one customer, yet I am not able to give you the exact number (as we consider it proprietary).
I do not consider Easypath as a competitor to ASICs (structured or otherwise), but as a cost lowering alternative for FPGA customers who no longer need to reconfigure their product. In effect, this is a new segment of an existing market.
Would these customers go to an ASIC if Easypath was not an option? I really don't know. I suspect not. I suspect they would just move on to the next product, and either end the life of the one, or accept reduced profits and reduced sales.
I know that Easypath is positioned as an alternative to Altera's HardCopy, but I disagree: Easypath is just that - easy. HardCopy is just that - hard.
One is buying exactly the same silicon for a lower price, and moving on.
The other is converting from a FPGA prototype of your design, to an ASIC, with all of those real risks (and I have heard of real cases of failure to converge from customers doing just that) and time to market issues.
We did have a program for cost reduction, and hardening the FPGA design. It was called Hardwire. We had Hardwire 1, 2, 3... All we learned from this was the ASIC business is not our business (it is totally different business). And, we also learned that it is incredibly hard to make any money. Lots of competitors, many that are very hungry, and will drop the prices to take business beyond sanity.
The structured ASIC shell and pea game is just that. Some of our hardwire products were just vias to short out memory cells, so the "conversion" was only a couple of masks, and costs were supposed to be incrediby low. Not. The story was good, but the reality was horrible: it didn't work the way it was supposed to (sound familar?). We eventually ended up with a standard cell ASIC flow after a gate array flow. Guess what? Didn't matter what the flow, it was still the ASIC business. You still did an incredible amount of work once, for one customer, with no guarantee of success, with no future, and no reuse of anything for the next technology node.
With a real chance of failure. If the customer makes a mistake, we both fail.
I like the model for FPGAs: if the customer makes a mistake, they fix it, and move on. Meanwhile we are succeeding with all of the other customers. They will succeed, too.
If you will, we already have "been there, done that" and decided that we should stick with the customers, markets, business and business models that have made us the success we are today.
Let those nine companies circle the drain, the plug has been pulled.
Austin