'EVENT (or rising_edge) static prefix requirement....

Ignore the test_case := ch_clk_div_int(k);

that was from something else i was trying... forgot to delete it

My guess is that there might be some issue with the sensitivity list. I assume you have an end loop statement. I got the same results: "requires a static signal prefix".

I had better results using a generate statement:

s_chan_gen: for k in 0 to 15 generate process (reset_delayed, ch_clk_div_int(k)) begin if reset_delayed = '1' then reset_chan_Q_int(k)

Paul schrieb:

move that for-loop outside of this process and change it to a for-generate. (And don't forget the "end generate;" - you have forgotten the "end loop;")

my_gen_label : for k in 0 to 15 generate

-- your process here end generate;

Note that not all synthesis tools accept the a vector element inside a rising_edge() expression. E.g. Synopsys Design Analyzer does not accept "rising_edge(ch_clk_div_int(k))". This is pretty annoying.

Ralf

Hey All,

Thanx for the suggestions. I also got a response from ModelSIM on this one.. apparently simulators do not just "unroll" the loop the same way synthesizers do (although, it sounds like not all synthesizers). The loop generate wrapped around the process is indeed the right answer. Thanx

-Paul

In simulation, the compiler has the OPTION to unroll a loop if it thinks it would be more efficient to execute that way. But it does not have to (it may be too large, or the loop may not be statically bound). Therefore the loop index is absolutely not static.

Synthesis tools always unroll loops (that's why they have to be statically bound for synthesis), and the index is then "treated as if static". In other words, the value of the index for each iteration is known at synthesis time and need not be calculated in hardware. Ditto for any otherwise static expressions of the index (i.e. "i+1" is treated as static, etc.). But from the language compilation/LRM point of view, it is not static.

Andy