What official function should I call to genertate a sum of products in VHDL

Weng Tianxiang schrieb:

Looks similar to standard multiplication. What about:

process(A,B) variable result : unsigned(result_bits-1 downto 0); begin result:=to_unsigned(0,result'length); for N in A'range loop if (A(N)='1') then result:=result+resize(unsigned(B(N)),result'length); end if; end loop; s

Weng,

If Ax is of type std_logic, you only has 2 very trivial cases to cover. Using multipliers would be a gigantic waste of FPGA resources... since you have no "non-trivial" cases to concern yourself with, you have a much simpler option than multipliers. Personally, I don't think students should be given answers from a message board, so that's as much of a hint as I am personally willing to give you (sorry, the problem is trivial enough to be a quite obvious homework assignment) But, think about what I said and why your 2 cases are very trivial....

-Paul

P.S. - It's actually trivial enough that a decent synthesizer would not synthesize multipliers if you did it that way anyway.... at least it shouldn't.