altera cyclone memory example

Hi Everyone,

I am a student trying to build a project with Altera's Cyclone FPGA board. For my project, I need to access a large amount of data, which I would like to store in the board's memory. I did not find any simple example which could show me how to simply read and write to the chip's built-in memory. Is there any ready made interface I could use? I would like not to use the Nios implementations, as they seem to be very large and complex for me at this stage.

Any help would be appreciated !!!

Thanks, Roi

Reply to
roiavidan
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the best advice dear student is to learn. learn by doing.

you refer both on-board and on-chip memry, so which one do you want to use??

FPGAs are not programmed, but rather you write the "description" of the hardware that you wish the FPGA to implement, this description may include different memory interfaces to either onchip or off chip (on-board) memories.

but the way you ask there is no response possible.

you can use Altera tools to create various onchip memories, and connect your logic to them. that is if you want to use the onchip memories

the interface to on-board memories depends on the type of the memory, and that can be very different.

SRAMs are very simple, DDR would be way more complex as example.

antti

Reply to
Antti

Learn a bit about the Avalon bus, used by SOPC builder. You don't need a Nios II processor on the bus - you can happily link up standard Altera SOPC components and your own components (and Wishbone modules from opencores). It's a lot easier than trying to learn how to make DDR memory interfaces and the like.

Reply to
David Brown

Start a project and open a new block diagram/schematic file. Once the block diagram workspace is open, double click anywhere within that space and the Symbol window will pop open. In the "Name" field type altsyncram and click on the "Ok" button, this will start the MegaWizard for Altera's on-chip RAM. Once you're in the MegaWizard's setup screens you will see a button labeled "Documentation". Clicking on this will give you documentation on how the internal RAM works.

Reply to
Rob

First of all - thanks alot for all of your quick replies. I will try to ask my question in a more precise manner.

I need to build a piece of hardware ( I already wrote most of it in vhdl and as schematic designs ) that will manipulate a large amount of data - data that i believe cannot fit on-chip with the design itself. thus i would like to use one of the on-board memories available to me. i believe the cyclone board comes with SRAM (or SDRAM), and with this board i also have a 32mb flash card.

what i'd like to know is how to use a simple ready-made interface for either one of these memories ( i don't care which one ). i do not want to write my own interface. i want the ability to read and write to memory without needing to know how the "memory internals" work.

is there such a solution for me?

many thanks again!!

Roi

Reply to
roiavidan

if you dont know if the memory is SRAM or SDRAM how can anyone really help you ???

SRAM has virtually no interface needed at all, just supply address, ce, rd wr and thats it SDRAM needs special controller. if you dont want to use nios/SOPC then you need to find some SDRAM controller and adapt it to your own use.

I bet finding the SDRAM controller from opencores should not take long ?

If you ask for simple interface to SDRAM then all the SDRAM IP cores assume some local bus interface what in turn may not be what you call simple, but here nobody can really help you, SDRAMs just arent so easy to handle as SRAMs, sure some SDRAM IP cores are simpler and easier to use then others. But wich one suites your application the best is up to you to decide.

Antti

Reply to
Antti

usually you start the other way round ... you first estimate the amount and datarate of memory required, then you design your dataflow and algorithm ...

- sram can directly address each memory-location

- with sd-ram you should work in bursts and linear in address space,

- flash-memory is way slower (on writes), should be used block-wise

why taking the trouble of using an FPGA if you do not care about speed?!

bye, Michael

Reply to
Michael Schöberl

Dear Student, Perhaps you may inform us of the Altera board of which you speak. The model number of the board would help.

Reply to
Jerry

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