problem programming Altera Cyclone device

It could be many things. Why do you think that it's a problem in programming?

One common reason for reset when an Altera device starts to run is leaving the "unused pins" configuration set to "output driving low" (a stupid default in Quartus).

Is this a NiosII design of your own targeted at the Altera Nios eval board?

If so then the config prom has a line from the FPGA, reconfig_req, that allows any Nios to request a reconfiguration. You need to set this permanently high (and assign it to the correct pin).

Nial.

---------------------------------------------------------- Nial Stewart Developments Ltd Tel: +44 131 561 6291

42/2 Hardengreen Business Park Fax: +44 131 561 6327 Dalkeith, Midlothian EH22 3NU

This is a design of my own not related in any way to NiosII. For the sake of testing, I also tried to program a simple blinking led design, and got the same result.

How do I do that? is it a jumper or a Quartus setting or what?

Are you using the NiosII development board to test your design?

What did you mean by "which comes with the NiosII processor already in it"?

If so, then the FPGA configuration is controlled by a small CPLD. When the board boots up I think this looks for the presence of several images in flash, picks one then configures the FPGA.

There's a line from the FPGA to this config controller, called reconfigreq_n which allows a Nios to cause the FPGA to be re-configured. If you don't drive this inactive then as soon as your design boots up the FPGA will go through a re-configuration and one of the valid Nios images will be loaded.

You need to add an output to your design (call it anything you want), set it high and assign it to the correct pin. On the CycloneII board with the EP2C35 it's pin AA14.

Nial

---------------------------------------------------------- Nial Stewart Developments Ltd Tel: +44 131 561 6291

42/2 Hardengreen Business Park Fax: +44 131 561 6327 Dalkeith, Midlothian EH22 3NU

Yes. I am using Nios development kit cyclone edition.

As soon as you plug the device to power, it configures itself as a nios processor. this is also confirmed by the nios manual which comes with the board.

This seems like what's happening. the safe mode led is on, btw.

high

I am using a Cyclone EP1C20 chip and not EP2C35 and I couldn't find where the reconfig_req is located in it. i have the pin list for that device, but I must say that I am not familiar with most of the acronyms used there. the previous device I used to work with was a Flex10k and it was way lot simpler to locate what I needed there. could you help me with the pin number that should be driven high in my design?

high

There's no FPGA pin called reconfigreq_n, it's a net on the board that goes from the FPGA to the config device.

From the Cyclone schematics I've got on this PC with the EP1C20 it might be connected to pin V8.

Nial.

---------------------------------------------------------- Nial Stewart Developments Ltd Tel: +44 131 561 6291

42/2 Hardengreen Business Park Fax: +44 131 561 6327 Dalkeith, Midlothian EH22 3NU

Correct,

pld_reconfigreq_n

Worked like a charm! :)

Thank you all for your help!!

Roi