Achieving timing in Xilinx EDK designs

I'm surprised that more people don't have this complaint. I struggled with this last year, and was only able to make timing by getting a copy of PlanAhead and heavily floorplanning my design. I had to go so far as to take a module like PLB_EMAC and floorplan each individual sub-module. In a typical PPC design, we have PLB_EMAC (or PLB_GEMAC), PLB_SDRAM, some PLB_BRAM, a PLB_IPIF, OPB2PLB bridge, OPB_EMC, OPB_GPIO and a couple of OPB_UARTs. The PLB & OPB buses run at 100MHz in a V2P20, V2P30 or V2P50. Once you have a good floorplan the timing problems go away.

Thanks a lot Joe! AFAIK PlanAhead is quite expensive (not sure though)... Is it an essential tool to get the job done in your opinion?

/Mikhail

I'm sure that there are experts here who could floorplan a design with pencil and paper and get great results, I couldn't. The 30-day free trial was enough to convince me that it was a tool I wanted to keep. I wouldn't say it is essential for everyone or even every PPC system designer, but it is a great tool for understanding the timing errors you're getting and making changes to eliminate those errors.

Hi All -

You can download a full featured 30-day eval copy of PlanAhead at

Salil

though)... Is

We have a XC2VP40 with 98% silce utilization. The System contains a PPC405 300 MHz with PLB 100 Mhz and OPB 50 Mhz. On PLB side we have - plb sdram - plb emac

- plb bram - plb dma ctrl ( own core) - plb user core 1 ( own core ) - plb user core 2 ( own core )

And i do not have any timing problems with ISE 8.1 and EDK 8.1. The flow needs quit a "long" time. But in the end i have (0) timing errors without planahead.

Andi

Andi,

Thanks for sharing this information. Do you use native XST synthesis? Did you use EDK wizard to build your custom cores?

Thanks, /Mikhail

needs quit a "long" time. But in the end i have (0) timing errors without planahead.

use xst ( ISE 8.1 SP3 ). I used the edk wizard to see what files i need for adding cores and then created the user ips with those files as often as i needed.

Is it possible to use other tool than xst for edk synthesis?

I haven't tried it, but I am sure one should be able to use Synplify...

/Mikhail