EDK: OPB_IPIF, too many versions...

OK, I have looked in the sources. It is pretty clear what the differences are, what is still not clear is why the wizard is 2 generations behind...

/Mikhail

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Sorry, talking to myself here... It's more mess than one could expect... There is a doc subfolder for each of the versions. Only some of them have datasheets included though. However, all of the datasheets share the same DS414 number, but the revision history in each of them don't match! Moreover, starting from v3.01a the datasheet became shorter and it doesn't mention neither DMA, nor master functionality anymore!!! Again, no clue about this in the revision history of the document :(

I would appreciate if someone from Xilinx could help me to make some sense of this...

Thanks, /Mikhail

One difference is that 3.01 supports autoincrement addressing, which can be useful for DMA.

However, 3.01 is slave only, it does not offer bus mastering capability with an internal DMA controller; that requires 2.xx.

This is unfortunate for me, having started with 3.01; I am currently using "opb_central_dma" for DMA transfers. Which double-handles data (reads it from external memory into its own buffer; THEN writes it to my core in a separate operation, taking 2 cycles per word transferred, plus overheads as it only transfers bursts of 16 words at a time.

When I want to add keyhole DMA to my core (to transfer data in a single operation) I will have to step back to 2.xx.

Anyway my guess is that you asked for OPB bus mastering capability, and the wizard picked the latest core that supports it...

Xilinx - what is the reasoning behind this? Where is it clearly explained? Are there any plans for a 3.xx version WITH mastering and DMA support?

And why is the autoincrement addressing (burst mode) in 3.01 limited to maximum 16 words per burst?

- Brian

This IPIF really sucks. About 8 months ago I built OPB peripheral (in EDK 7.1) with a wizard with everything included (DMA, master...). After months of testing I found out that DMA transfer doesn't work as it should, master also sucks... In EDK 8.1 wizard is the same using the same version IPIF files (2.x). IPIF 3.x is unfortunaltelly slave only, which is of no use. It is about time that Xilinx produces new IPIF for distributed DMA service (included in the peripheral) and master capabilities. After all the trouble I've been through I had to do it by myself (since I needed fast DMA). Central DMA sucks also, because It has 16 word fifo and data must be transferred twice resulting in a very poor performance (but you can take its master state machine as an example for building one!). So I bult a OPB peripheral with DCR register interface (for PPC) with a built in DMA (from peripheral to DDR ram only) and it works very well. Now I am adopting it to MicroBlaze, but I am encountering severe dificulties, because I have two OPB busses in a same peripheral - master and slave (separated!!). I am not sure if MicroBlaze architecture support multi-master OPB.

Cheers,

Guru

MM wrote:

Do you know if PLB IPIF is any better?

Thanks, /Mikhail