Electronics Design

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LT Spice Dataflag

My schematic started showing DC voltages all over the place. When I saved it and closed it and re-opened, the flagged v...
13 comments posted 5yrs
posted by jlarkin
13 comments posted 5yrs posted by jlarkin

Power Path Controller LT4416

A power design is using the circuit in Fig 2 with some small changes. A 10 K series resistor is added to the E1 input a...
4 comments posted 5yrs
posted by gnuarm.deletethisbit
4 comments posted 5yrs posted by gnuarm.deletethisbit

(wx)Maxima

Hi all, Did not use wxMaxima for a while now (great tool for EEng BTW) ... I need to extract a particular variable from...
18 comments posted 5yrs
posted by h.bouazizviallet
18 comments posted 5yrs posted by h.bouazizviallet

Kirk Sorensen - Thorium's One-Man Band vs. Fusion

Rather than hijack another thread, I thought we could start another thread since people seem to want to discuss it. I r...
18 comments posted 5yrs
posted by gnuarm.deletethisbit
18 comments posted 5yrs posted by gnuarm.deletethisbit

PHB FPGA question

OK, pointy-haired boss question. Given a ZYNQ 7020, speed grade 1. A 3.3 volt i/o bank gets a clock from an LVDS input....
4 comments posted 5yrs
posted by jlarkin
4 comments posted 5yrs posted by jlarkin

lump-loaded diff pair

https://www.dropbox.com/s/4xp7tbacd1151r9/Loaded_Diff_Pair_1.jpg?raw=1 The 1G resistors keep the DC levels from wanderi...
4 comments posted 5yrs
posted by jlarkin
4 comments posted 5yrs posted by jlarkin

tech exodus?

https://www.breitbart.com/economy/2020/12/22/existing-home-sales-3/ I've heard personal stories along this line. One fr...
97 comments posted 5yrs
posted by jlarkin
97 comments posted 5yrs posted by jlarkin

Strange peaks on integrated POL module

Hi I am using this POL converter: https://www.intel.com/content/www/us/en/programmable/products/power/devices/powersoc-...
19 comments posted 5yrs
posted by klauskvik
19 comments posted 5yrs posted by klauskvik