Why are there no low pin count FPGAs?

Un bel giorno David L. Jones digitò:

Really? The next time, can you ask them why the same FPGA cost a *lot* more in its maximum pin configuration rather than its minimum pin configuration?

Just to make some examples from Digikey:

XC3S400-4FTG256C price 27.76000 XC3S400-4FGG456C price 48.32000

XC3S1000-4FTG256C price 47.87000 XC3S1000-4FGG456C price 63.79000 XC3S1000-4FGG676C price 87.91000

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asd
Reply to
dalai lamah
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You tried BGA ..?

Seems like a challenge ;)

Reply to
pbdelete

re

n?

It's most likely to be phantom pricing. The cost difference in manufacturing wouldn't be nearly that large. They charge more because people expect to pay more...

Dave :)

Reply to
David L. Jones

A quick hack is to solder some wirewrap leads to the bga balls. Should not become a "forrest" if there's so little pins needed.

Reply to
pbdelete

without flash, sram and

I agree. Too many boards try to be too much => cost..

Reply to
pbdelete

It was like the transition from thru-hole to 1206 surface-mounts: it seemed scairy, but it turned out to be no big deal. You do need 6 or

8-layer boards with 10-12 mil vias and 6 mil traces, but that's not hard to come by these days. Routing is tricky, but you just puzzle through it. We initially sent the boards out for assembly but then my production people said "we can do that" and they did. We've only done about 50 boards so far, with a 456-ball fpga, and we've had zero defects. I've heard the claim that bga's are easier to do than fine-pitch TSOP-type things.

John

Reply to
John Larkin

schrieb im Newsbeitrag news:4482c4c6$0$491$ snipped-for-privacy@news.luth.se...

pinout.

without flash, sram and

Thank you very much for yours and Mike's feedback. Our next FPGA product will be optimized for higher pin count and lower cost. But there are still lots of customers who likes 5V cmos levels...

The GOP-XC3S200 module was originally designed for a customer who wanted to redesign an old video processor board consisting of tens of GAL devices with an FPGA device. So level shifters were necessary to fit into the old 5V sockets. The logic design was easily copied from the old PALASM sources to VHDL. After certifying the new design with all the old software, a new pcb layout with an FPGA was done. The customer was happy, because the transtion to the new technology was fast and simple.

Since there are lots of unused pins on a TQFP100 to DIL24 adapter board, an SRAM seemed to be the most meaningful extension to our GOP-XC3S200 module.

For lots of FPGA designs, a RAM device is very handy, especially for video or audio applications. We currently produce some adapterboards with 7 segment led displays, usb and rs485 tranceivers, audio adc's and audio dac's which fits into the testconnector of our modules. These are intended to help in studying logic design. Some application designs will be published to show digital audio potentials of FPGA's.

MIKE

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www.oho-elektronik.de
OHO-Elektronik
Michael Randelzhofer
FPGA und CPLD Mini Module
Klein aber oho !
Reply to
M.Randelzhofer

Quick thought without looking at chip packages. Maybe bga can "afford" larger pad area because there's more area underneath the chip than at the circumference ..?

Reply to
pbdelete

Maybe so. And BGA balls are inherently planar, unlike gullwings that can get offset in handling and not all sit flat on their pads.

Of course, inspection and rework get sorta nasty.

I think I could program an FPGA to inspect all its own solder joints.

John

Reply to
John Larkin

There's another approach to solder bga. Have some kind of bed of nails to which the bga is soldered onto. If an attachment fails, one just desoldered that particular nail by the heat from the underside which the nail will conduct. Or it may simple just reattach by the heat added. The "nails" could be wires too ofcourse..

BGA Nail/Wires ----PCB-----

Reply to
pbdelete

Yes, and self-centering, as well.

Not so bad. The contractors I've used do X-Ray inspection and have full rework capability (re-balling BGAs can be expensive, but clost to the cost of a big FPGA). BGAs haven't been much of an issue for a decade (and IBM has been doing essentially the same thing with C4 for three).

Sure, you could program it to "inspect" for shorts and opens. Cracks, slight misplacement, and "almost opens" might be a little more difficult.

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  Keith
Reply to
Keith

On Sun, 04 Jun 2006 15:59:08 -0700, John Larkin transparently proposed:

Nasty, no. Expensive, yes if you want it done right.

~750K for an Agilent 5DX X-ray. The rework stations can also range up to some very expenive propositions. Both of previous require well trained operators.

Trained operators/programmers is probably more important than the actual equipment used.

Unlikely. The multiple power and ground pins would not be possible. X-Ray is just about the only way to check those pins.

Depending upon the board design, it can be quite easy to test FPGA with JTAG. Corelis, Asset-Intertech, Jtag Technologies, Goepel all make exceedingly well designed JTAG test packages.

Reply to
Sproket

It'd be cheaper for us to throw away the bad boards.

We do have a prism viewer thing that works pretty well 5 or 6 balls in from the edges, and can catch gross shorts even deeper.

Well, OK, but if it works, enough power and ground pins are likely connected. I was thinking that one could test all i/o pins for opens or shorts, without requiring any other part on the board to have JTAG, which few do in most situations.

John

Reply to
John Larkin

Un bel giorno David L. Jones digitò:

This is a further clue to something I'm aware from a while: there isn't any real competition in FPGA market. When you can afford to sell different package options with more than a 100% markup, announce new models that won't be available for months, don't have any distributor that can handle to sell small quantities of your bigger models, it means that you run a monopoly. A and X just pretend to be in competition.

Until some time ago I was very excited about FPGA technology. Now the FPGA vendors are pushing me away from it. I know it's a pity, but what should I do?

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asd
Reply to
dalai lamah

Un bel giorno John Larkin digitò:

No one denies that when you are in production stage there isn't any real problem with BGA. But when you are in prototyping stage, I don't think any one would try to solder a 100$ BGA with a toaster oven or any other ridiculous home-made solution that you can read on the Internet...

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asd
Reply to
dalai lamah

If you don't push the bleeding edges, there are some fantastic deals, like a Spartan XC3S200-TQ144 for 11 bucks in modest quantities. That's "200,000 equivalent gates" of ecl-speed logic for 5 millicents per gate, if you buy the equivalence claim. It helps balance those GigaComm gates at $35 each.

John

Reply to
John Larkin

Except that people do!

But the important thing about soldering BGAs reliably is the time-temperature profile, and you need a decent conveyerized oven and some ride-through instrumentation for that.

John

Reply to
John Larkin

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