Hallo,
has anybody some pin count requirements for the Latticemico32? I know, it depends heavily on the choosen combination, so information to the configuration is welcome.
CLB Requirements would also be fine.
Thanks
Hallo,
has anybody some pin count requirements for the Latticemico32? I know, it depends heavily on the choosen combination, so information to the configuration is welcome.
CLB Requirements would also be fine.
Thanks
I'm playing with the mico32 ported to Virtex on
That particular project has only 8 output bits (plus power, ground and clock). It has 1k x 32 of BRAM and the only peripheral is a GPIO.
Resource usage on the Spartan 3E is:
825 slice flipflops 1513 LUTs 162k equivalent gate count70 MHz maximum clock frequency
I tried to run the ISE-8 project on ISE9.1 and ISE crashed. Annti's documentation is more then compact and I didn't succeed to recreate a project for ISE-9, not understanding the what was needed around some schematic component.
Do you run on ISE-9? Are you willing to give away your project file?
Thanks
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