Minimilist Level Shifting

The common base shifter seems a good compromise between cost and speed/power consumption:

And there's Jim Thompson's variant on it if the naked topology edges are too slow:

Why not one resistor?

Maybe I'm missing something, but the transistor circuit seems to be equivalent to an open collector circuit. I suppose the transistor action on the rising edge in this configuration does pump current into the 3.3V side until the BE is no longer forward biased, so a speed up over a simple pullup. In this case the actual pullup just assures the signal stays high when the transistor is cut off. Still, that's two resistors and a transistor, so more circuitry than a pair of resistors or a resistor-Zener combination. I can get two Zeners in a SOT-363 package which is just 2 x 2 mm. Also, the two resistors are likely to draw more current that a simple resistor or Zener circuit.

I can't say I understand the other circuit. Should I assume the inverter is powered from 3.3V? It would appear that R3 is important to the delay of the circuit and presents the same problems of current draw as the Zener or resistor circuits. The 74HC14 is 5V tolerant. Why not just use the inverter by itself?

What am I missing?

I use this arrangement:

Works in both directions, speed-limited by the pullup R on one side.

One resistor from the 5 volt output to the upper clamp diode of the following 3.3 V CMOS seems OK for low speeds but RS-422 can go fast, do we wanna go fast? Don't know.

They don't call me Ricky Bobby for nothin'! Yeah, I don't know if it is used much, but the RS-422 device is rated for 20 MHz or more and there's no reason for this circuit to slow it down. I don't recall the speed limitation inside the FPGA. Not because of logic delays, but there's a circuit to extract a clock from data transitions which can't run faster than a third the FPGA clock. Sort of a Nyquist like thing.

I'll probably just use a couple of LVC inverters. It's probably just easier to do that, than to fuss over the limitations of a circuit that will be twice the size on the board.

Generally, I like to optimize designs for costs in manufacturing, and of course, the board is going to be very, very tight. At least the parts shortages seem to be loosening up a bit. Right now, I don't have any parts in the design that I can't buy. That's a big plus!

Yes, I've used that sort of circuit before, but with the switch inside a chip and 10 bits wide. It was always easy to buy and very cheap. So, of course, in this design I don't need it anymore. I do still need two bits. I was hoping to use a Greenpak device for this, but they have various capabilities in various chips. I can't find a chip that even includes two of the several jelly bean functions I'd like to include, of which this is one. These functions just are not compatible in a Greenpak device.

12 cent in quantity, makes it pretty easy:

That JT circuit (which was originally for 3.3 to 5) I think can be made to work at speed by running everything at 3.3 volts and putting 5 volts to the emitter, but it will be as you say hard to make low-power and it's a fair number of parts

Like it might be a more cost-effective hack if you had 20 lines to shift but if it's just two pair of differential send and returns probably best to just by the chip that does the thing, at that price.

If you want to power it from 5V, it's 5V tolerant; if you power it from 3.3V, it isn't. CD4049 and CD4050, powered from 3V takes 5V input, different input clamp diode structure.

That could work. But I'd need a circuit to shift from the 5V output of the CD4000 parts to the 3.3V device being driven. See the problem?

Bit explained that it was actually a 3.3V to 5V circuit. So clearly, it isn't going to do a great job of 5V to 3.3V, at least, not much better than an open collector transistor. The inverter is just there to shape up the slow rise time with its Schmitt trigger.

If the 3.3V input has a 5V tolerant ESD structure then of course no level shift is needed. If the 3.3V supply rail is stiff enough to accept a few mA injection then a series resistor might be all you need. For example 200 ohms would limit ESD diode current to 5mA and assuming 10pF input capacity would only slowdown 2ns,

piglet

No problem; 4000 series CMOS works at 3.3V just fine (not very fast, as logic goes, though). CMOS output isn't 5V if you don't power it from 5V.

Yeah, on the original iteration of this design, I forgot about the level shift required. I actually used a Zener diode rather than the resistor and got the current down to ~2 mA static. I know people talk about this being acceptable practice, but I'm not up for that. A single logic part with two inverters (74LCV14) will do the job, and is available in a very small no-lead package. I like to keep a clean BoM with a minimum of parts, but a single inverter chip won't be a problem. Lots of stock at Digikey and Mouser and many, many substitutes.

But it's also not 5V tolerant. If you are suggesting to use the entire circuit with the inverter, transistor and four resistors, that's just excessive. I don't know what that circuit was intended for, but maybe it was before there were single chip alternatives, or the 74HC14 was already in the circuit. This design is going to be extremely tight, so I'm scrubbing all the space I can. The 74LVC14 sounds good because I can get it in a 1 x 1.5 mm package. That's about the size of a single 0603 resistor.

Put a small capacitance across the series resistor. This will speed up the transitions. Keep the capacitance small so that it doesn't hurt the CMOS ESD protection diodes during transitions. A suitable capacitance would be in the same order as the CMOS input capacitance.

If a two resistor voltage divider is used to drop from 5 V to 3.3 V, put capacitors in parallel with both resistors so that the reactance ratio matches the resistor ratio. This doesn't risk the CMOS ESD diodes, but do not use too big capacitors that might limit the TTL output swing.

Regarding RS-422 transceivers, don't use full speed devices, unless it is strictly required. The high speed devices connect a lot of high speed line noise into the receivers. There are a lot of transceivers that are speed limited to 250 kbit/s which is especially usable for hundred of meters long lines. The RS-422 specifies up to 100 kbit/s up to 1200 m long lines.

If you're not too high in the megabauds that could work.

1mA into a 3.3V zener won't get you more than 3.3V, and should get you enough for a logic high

Use a 3.3V transceiver.

søndag den 9. april 2023 kl. 03.22.56 UTC+2 skrev Ricky:

plenty of parts are specified for injecting several mA into the ESD diodes so all you need going from 5V to 3.3V is single resistor

RS422 isn't fast!

It can probably be done with a direct connection, if the driver is classic TTL and the load is modern CMOS. TTL doesn't pull up to +5.

A 200 ohm resistor would limit the ESD diode current if that's a concern.