EL7900

What others?

Forgot to mention...

Though I rarely use S-K filters because their component sensitivities become gross at any Q>1, you _can_ easily calculate (BY HAND) the effect of OpAmp GBW on performance... try it sometime, the gain of an OpAmp is simply...

GBW/s

(You can ignore the DC "flattening" for purposes of analyzing AC performance.) ...Jim Thompson

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Actually, the circuit is a joke. What John Fields ought to be synthesising - and what I originally thought that he was synthesising, until I looked at the waveforms in detail - is a "modified sine wave"

-- --

- - - - - -- --

where the nett signal being fed into U4, U5 and U6 is high for one third of the time, low for one third of the time and and zero for two intervening periods of one sixth of the time. This has no third harmonic content, and has been popular in cheap inverters for many years.

I don't know if there is an elegant way to synthesis this with Johnson counters - I can't think of one off the top of my head.

It's trivial with regular counters and bit of decoding logic.

-- Bill Sloman, Nijmegen

On Sep 9, 1:02=A0am, John Fields wrote:

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It's what you should have designed if you wanted to produce three close approximations to a sine wave precisely 120 degrees apart.

There are better digital approximations to a sine wave - Don Lancaster's magic sine waves list a whole lot of them - but the digital logic required to generate them gets bulky. Easy enough to realise in a cheap programmable logic device, but messy.

Having zero third harmonic content reduces the RC product of the filters you need to reduce the higher harmonic content of the digital first approximation to something "close enough" to a sine wave, without the tolerances on the Rs and Cs in the filters introducing more arbitrary phase differences than strictly necessary.

That you didn't have that in mind when you designed the circuit makes you close to incompetent

But it's more nearly sinusoidal than what you did produce, and correspondingly easy to filter.

Messy in LTSpice. This does show the divide-by-twelve that you'd need, even though it isn't doing quite the same thing. You'd have to put together a different collection of gates to generate a bunch of modified sine waves, but that wouldn't be all that difficult.

Version 4 SHEET 1 1992 1652 WIRE 560 -576 -784 -576 WIRE 240 -544 -64 -544 WIRE 208 -528 -64 -528 WIRE -32 -512 -64 -512 WIRE -128 -496 -528 -496 WIRE -32 -496 -32 -512 WIRE -32 -496 -64 -496 WIRE -32 -480 -32 -496 WIRE -32 -480 -64 -480 WIRE -384 -464 -496 -464 WIRE -80 -464 -80 -480 WIRE -32 -464 -32 -480 WIRE -32 -464 -80 -464 WIRE 0 -464 -32 -464 WIRE 240 -448 240 -544 WIRE 272 -448 240 -448 WIRE 416 -448 352 -448 WIRE 448 -448 416 -448 WIRE 480 -448 448 -448 WIRE -384 -432 -384 -464 WIRE -528 -384 -528 -496 WIRE -464 -384 -528 -384 WIRE 240 -384 240 -448 WIRE 240 -384 -304 -384 WIRE 480 -368 480 -448 WIRE -464 -336 -608 -336 WIRE -384 -240 -384 -288 WIRE -384 -240 -560 -240 WIRE 240 -208 240 -384 WIRE 240 -208 -208 -208 WIRE -272 -192 -528 -192 WIRE -176 -192 -208 -192 WIRE 0 -192 0 -464 WIRE 0 -192 -176 -192 WIRE 480 -192 480 -288 WIRE 480 -192 0 -192 WIRE -176 -176 -176 -192 WIRE -176 -176 -208 -176 WIRE -496 -160 -496 -464 WIRE -384 -160 -496 -160 WIRE 208 -160 208 -528 WIRE 208 -160 -208 -160 WIRE 176 -144 -208 -144 WIRE -384 -128 -384 -160 WIRE -240 -112 -240 -144 WIRE -176 -112 -176 -176 WIRE -176 -112 -240 -112 WIRE -528 -80 -528 -192 WIRE -464 -80 -528 -80 WIRE 80 -80 -304 -80 WIRE 176 -80 176 -144 WIRE 176 -80 80 -80 WIRE 272 -80 176 -80 WIRE 416 -80 416 -448 WIRE 416 -80 352 -80 WIRE 976 -48 944 -48 WIRE 1168 -48 976 -48 WIRE 1392 -48 1248 -48 WIRE 1472 -48 1392 -48 WIRE -608 -32 -608 -336 WIRE -464 -32 -608 -32 WIRE 176 -32 -288 -32 WIRE 560 -32 560 -576 WIRE 512 -16 480 -16 WIRE 80 16 80 -80 WIRE 80 16 48 16 WIRE -16 32 -48 32 WIRE 240 32 240 -208 WIRE 240 32 48 32 WIRE 80 48 48 48 WIRE 944 48 944 -48 WIRE 992 48 944 48 WIRE 1216 48 1072 48 WIRE 1360 48 1216 48 WIRE 1472 48 1472 -48 WIRE 1472 48 1440 48 WIRE 80 64 80 48 WIRE 80 64 48 64 WIRE -560 80 -560 -240 WIRE -384 80 -384 16 WIRE -384 80 -560 80 WIRE -48 80 -48 32 WIRE -48 80 -80 80 WIRE 80 80 80 64 WIRE 80 80 48 80 WIRE -144 96 -160 96 WIRE -48 96 -80 96 WIRE -48 112 -48 96 WIRE -48 112 -80 112 WIRE 32 112 32 80 WIRE 48 112 32 112 WIRE 80 112 80 80 WIRE 80 112 48 112 WIRE -160 128 -160 96 WIRE -160 128 -192 128 WIRE -48 128 -48 112 WIRE -48 128 -80 128 WIRE -256 144 -528 144 WIRE -160 144 -192 144 WIRE 208 144 208 -160 WIRE 208 144 -80 144 WIRE 992 144 944 144 WIRE 1152 144 1072 144 WIRE 1360 144 1152 144 WIRE 1472 144 1440 144 WIRE -176 160 -176 -112 WIRE -176 160 -192 160 WIRE -496 176 -496 -160 WIRE -384 176 -496 176 WIRE -176 176 -176 160 WIRE -176 176 -192 176 WIRE -96 176 -96 144 WIRE -48 176 -48 128 WIRE -48 176 -96 176 WIRE 48 176 48 112 WIRE 48 176 -48 176 WIRE -176 192 -176 176 WIRE -176 192 -192 192 WIRE -384 208 -384 176 WIRE -224 208 -224 192 WIRE -176 208 -176 192 WIRE -176 208 -224 208 WIRE 48 208 48 176 WIRE 48 208 -176 208 WIRE 560 208 560 64 WIRE 608 208 560 208 WIRE 688 208 608 208 WIRE 800 208 752 208 WIRE 1120 208 880 208 WIRE 1152 208 1152 144 WIRE 1152 208 1120 208 WIRE -528 256 -528 144 WIRE -464 256 -528 256 WIRE -160 256 -160 144 WIRE -160 256 -304 256 WIRE 80 256 -160 256 WIRE 272 256 80 256 WIRE 416 256 416 -80 WIRE 416 256 352 256 WIRE 480 272 480 -16 WIRE 480 272 416 272 WIRE -608 304 -608 -32 WIRE 560 288 560 208 WIRE 672 288 560 288 WIRE 816 288 752 288 WIRE 1152 288 1152 208 WIRE 1152 288 880 288 WIRE -464 304 -608 304 WIRE 80 304 80 256 WIRE 80 304 16 304 WIRE 416 304 416 272 WIRE -48 320 -112 320 WIRE 240 320 240 32 WIRE 240 320 16 320 WIRE 176 336 176 -32 WIRE 176 336 16 336 WIRE 560 336 560 288 WIRE 48 352 48 208 WIRE 48 352 16 352 WIRE 944 352 944 144 WIRE 1024 352 944 352 WIRE 1104 352 1024 352 WIRE 1360 352 1168 352 WIRE 1472 352 1472 144 WIRE 1472 352 1360 352 WIRE -784 368 -784 -576 WIRE 48 368 48 352 WIRE 48 368 16 368 WIRE -560 384 -560 80 WIRE -384 384 -384 352 WIRE -384 384 -560 384 WIRE 0 384 0 368 WIRE 48 384 48 368 WIRE 48 384 0 384 WIRE -112 416 -112 320 WIRE -112 416 -176 416 WIRE 208 416 208 144 WIRE 208 416 -112 416 WIRE 512 416 480 416 WIRE -240 432 -528 432 WIRE -112 432 -176 432 WIRE 480 432 480 416 WIRE -144 448 -176 448 WIRE -496 464 -496 176 WIRE -384 464 -496 464 WIRE -144 464 -144 448 WIRE -144 464 -176 464 WIRE 944 464 944 352 WIRE -144 480 -144 464 WIRE -144 480 -176 480 WIRE -384 496 -384 464 WIRE -208 496 -208 480 WIRE -144 496 -144 480 WIRE -144 496 -208 496 WIRE 416 512 416 368 WIRE 480 512 480 496 WIRE 480 512 416 512 WIRE -528 544 -528 432 WIRE -464 544 -528 544 WIRE -112 544 -112 432 WIRE -112 544 -304 544 WIRE -32 544 -112 544 WIRE 768 544 -32 544 WIRE 896 544 832 544 WIRE 1472 544 1472 352 WIRE -608 592 -608 304 WIRE -464 592 -608 592 WIRE -32 592 -288 592 WIRE 1088 592 -32 592 WIRE 1088 624 1088 592 WIRE 1296 624 1088 624 WIRE 1424 624 1360 624 WIRE -560 672 -560 384 WIRE -384 672 -384 640 WIRE -384 672 -560 672 WIRE -608 704 -608 592 WIRE -384 704 -384 672 WIRE -608 720 -608 704 WIRE 80 752 80 304 WIRE 480 752 480 512 WIRE 480 752 80 752 WIRE -784 816 -784 448 WIRE -608 816 -608 784 WIRE -608 816 -784 816 WIRE -496 816 -496 464 WIRE -496 816 -608 816 WIRE -384 816 -384 784 WIRE -384 816 -496 816 WIRE -144 816 -144 496 WIRE -144 816 -384 816 WIRE 48 816 48 384 WIRE 48 816 -144 816 WIRE 560 816 560 432 WIRE 560 816 48 816 WIRE 944 816 944 560 WIRE 944 816 560 816 WIRE 1216 816 1216 48 WIRE 1216 816 944 816 WIRE 1472 816 1472 640 WIRE 1472 816 1216 816 WIRE -784 848 -784 816 FLAG -784 848 0 FLAG 976 -48 out- FLAG 1392 -48 out+ FLAG 1024 352 tank- FLAG 1360 352 tank+ FLAG 1120 208 ct FLAG 608 208 Drive FLAG -32 592 M1-drive FLAG -32 544 M2-drive FLAG 448 -448 Count SYMBOL ind2 976 160 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 4 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 0.00025 SYMATTR Type ind SYMATTR SpiceLine Rser=3D0.022 SYMBOL ind2 1344 160 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 4 56 VBottom 0 SYMATTR InstName L2 SYMATTR Value 0.00025 SYMATTR Type ind SYMATTR SpiceLine Rser=3D0.022 SYMBOL nmos 1424 544 R0 WINDOW 0 -49 26 Left 0 WINDOW 3 -80 114 Left 0 SYMATTR InstName M1 SYMATTR Value FDS6680A SYMBOL nmos 896 464 R0 SYMATTR InstName M2 SYMATTR Value FDS6680A SYMBOL cap 1168 336 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 46 32 VTop 0 SYMATTR InstName C1 SYMATTR Value 100n SYMBOL ind2 784 224 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L3 SYMATTR Value 0.001 SYMATTR SpiceLine Rser=3D0.044 Cpar=3D100p SYMATTR Type ind SYMBOL voltage -784 352 R0 WINDOW 123 0 0 Left 0 WINDOW 39 24 132 Left 0 SYMATTR SpiceLine Rser=3D0.001 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL ind2 976 64 R270 WINDOW 0 44 45 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L4 SYMATTR Value 0.0000253 SYMATTR Type ind SYMATTR SpiceLine Rser=3D0.004 Cpar=3D100pF SYMBOL ind2 1344 64 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L5 SYMATTR Value 0.0000253 SYMATTR Type ind SYMATTR SpiceLine Rser=3D0.004 SYMBOL res 1264 -64 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL FerriteBead 720 208 R270 WINDOW 0 16 0 VTop 0 SYMATTR InstName L6 SYMATTR Value 1.545=B5 SYMATTR SpiceLine Ipk=3D0.2 Rser=3D1 Rpar=3D785 Cpar=3D535f mfg=3D"Wurth Elektronik eiSos" pn=3D"742 792 79" SYMBOL FerriteBead 800 544 R90 WINDOW 0 -16 0 VBottom 0 SYMATTR InstName L7 SYMATTR Value 1.542=B5 SYMATTR SpiceLine Ipk=3D1 Rser=3D0.3 Rpar=3D587 Cpar=3D1.216p mfg=3D"Wurth Elektronik eiSos" pn=3D"742 792 18" SYMBOL FerriteBead 1328 624 R90 WINDOW 0 -16 0 VBottom 0 SYMATTR InstName L9 SYMATTR Value 1.542=B5 SYMATTR SpiceLine Ipk=3D1 Rser=3D0.3 Rpar=3D587 Cpar=3D1.216p mfg=3D"Wurth Elektronik eiSos" pn=3D"742 792 18" SYMBOL nmos 512 336 R0 SYMATTR InstName M3 SYMATTR Value FDS6680A SYMBOL pmos 512 64 M180 SYMATTR InstName M4 SYMATTR Value FDS4435A SYMBOL voltage -608 688 R0 WINDOW 3 32 168 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 5 2.55u 0.1u 0.1u 2.55u 5.30u 2000) SYMATTR InstName V2 SYMBOL Digital\\dflop -384 496 R0 WINDOW 3 8 168 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A1 SYMBOL Digital\\dflop -384 208 R0 WINDOW 3 8 168 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A2 SYMBOL Digital\\dflop -384 -128 R0 WINDOW 3 8 168 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A3 SYMBOL Digital\\dflop -384 -432 R0 WINDOW 3 8 168 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A4 SYMBOL Digital\\xor -256 -240 M0 WINDOW 3 16 112 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A5 SYMBOL Digital\\xor -240 96 M0 WINDOW 3 16 112 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A6 SYMBOL Digital\\and 16 -16 M0 SYMATTR InstName A7 SYMATTR Value2 Vhigh=3D5V Trise=3D100n Td=3D100n SYMBOL Digital\\xor -224 384 M0 WINDOW 3 16 112 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A8 SYMBOL Digital\\or -112 48 M0 WINDOW 3 154 945 Left 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A10 SYMBOL voltage -384 688 R0 WINDOW 3 352 168 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 5 1u 0.1u 0.1u 1u 2.2u 1) SYMATTR InstName V3 SYMBOL Digital\\and -16 272 M0 SYMATTR InstName A9 SYMATTR Value2 Vhigh=3D5V Trise=3D100n Td=3D100n SYMBOL Digital\\or -96 -576 M0 WINDOW 3 -8 128 Invisible 0 SYMATTR Value Vhigh=3D5V Trise=3D100n Td=3D100n SYMATTR InstName A11 SYMBOL res 368 -464 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 400k SYMBOL res 368 -96 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R2 SYMATTR Value 200k SYMBOL res 368 240 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 100k SYMBOL res 464 -384 R0 SYMATTR InstName R5 SYMATTR Value 1k SYMBOL FerriteBead 480 464 R0 WINDOW 0 -56 1 Left 0 SYMATTR InstName L8 SYMATTR Value 1.542=B5 SYMATTR SpiceLine Ipk=3D1 Rser=3D0.3 Rpar=3D587 Cpar=3D1.216p mfg=3D"Wurth Elektronik eiSos" pn=3D"742 792 18" SYMBOL FerriteBead 416 336 R0 WINDOW 0 -56 1 Left 0 SYMATTR InstName L10 SYMATTR Value 1.542=B5 SYMATTR SpiceLine Ipk=3D1 Rser=3D0.3 Rpar=3D587 Cpar=3D1.216p mfg=3D"Wurth Elektronik eiSos" pn=3D"742 792 18" SYMBOL res 768 272 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R6 SYMATTR Value 300R SYMBOL cap 880 272 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C2 SYMATTR Value 47p TEXT -568 888 Left 0 !.tran 0 10m 5m 10n TEXT 944 -280 Left 0 !K1 L1 L2 0.99 TEXT 944 -248 Left 0 !K2 L1 L4 0.99 TEXT 944 -216 Left 0 !K3 L1 L5 0.99 TEXT 944 -184 Left 0 !K4 L2 L4 0.99 TEXT 944 -152 Left 0 !K5 L2 L5 0.99 TEXT 944 -120 Left 0 !K6 L4 L5 0.99 TEXT -568 928 Left 0 !.ic I(L4)=3D-0.00 I(L5)=3D-0.000 I(L3)=3D-0.00003 I(l6)=3D0.00003 I(L1)=3D0 I(L2)=3D0\n.ic V(tank-)=3D0 V(ct)=3D1.5 V(tank+)= =3D3.0

-- Bill Sloman, Nijmegen

Slowman can't even fart without someone to assist him with parting his ass... two assistants, two flashlights, and at least one mirror ;-) ...Jim Thompson

-- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

Hey, Jim, show us how it's done.

. . . . . Q1.--[20K]--. . | Q2.--[12K]--+---- . | Q3.--[12K]--| . | 4017 Q4.--[20K]--' . Q5. . Q6. . Q7.---. . | RESET.---' . . . . . ?

If you'll fart, I'll light the match ;-) ...Jim Thompson

The logic is a mess, A4 and A5 are superfluous, the phase3 filter input can be taken from Q-bar on A2 and all that's neede to ensure sensible startup and glitch recovery is an and gate taking A2 Q-bar and A3 Q and feeding it back to A1 CLR,

Jim-out-of-touch-with-reality_Thompson has got me kill-filed, so he posted the above miss-estimation a little bit more than two hours after I'd posted a circuit satisfying John Fields' request. Admittedly, it was a circuit that I'd put together years earlier, so my "trivial" was based on more direct experience than such comments usually are, but it was perfectly adequate to illustrate that Jim's judgement is inadequate (as if that needed further illustration)..

-- Bill Sloman, Nijmegen =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0 ..

=A0 =A0 =A0...Jim Thompson

Jim-out-of-touch-with-reality-Thompson hasn't quite taken on board that he's in Arizona and John Larkin is in California - the match has to be a little closer to the methane concentration to do anything useful.

-- Bill Sloman, Nijmegen

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Not good. The "Reset" input on the 4017 is an asynchronous clear, so this would produce a very narrow clear pulse - essentially the propagation delay from "reset" to Q7. There's no minimum propagation time. The typical at 5V is 265nsec, and the worst case minimum reset time is 260nsec, so you might manage to reset only some of the bistables.

And the resistor values don't look right either. You could simulate a

-- Bill Sloman, Nijmegen

The datasheet sanctions this use of reset

Tor the correct ratio 12K should be 11.86K, but they're a bit low this means I'd have to consider the 4017 output impedance, but that seems to vary with supply voltage maybe just multiply by 1000 and hope.

On 2012-09-09, John Fields wrote:

With three flip-flops and 6 legal states there are only 2 illegal states (101) and (010). If it starts in one of the illegal states the circuit will alternate between them on each clock pulse. The and gate traps one of them (101) and converts it to a legal state (001).

This is your circuit with edits:

Version 4 SHEET 1 1624 1476 WIRE -432 -528 -464 -528 WIRE -320 -528 -352 -528 WIRE -48 -448 -176 -448 WIRE 80 -448 -48 -448 WIRE -592 -432 -1328 -432 WIRE -480 -432 -512 -432 WIRE -464 -432 -464 -528 WIRE -464 -432 -480 -432 WIRE -416 -432 -464 -432 WIRE -320 -432 -320 -528 WIRE -320 -432 -352 -432 WIRE -176 -416 -176 -448 WIRE -48 -352 -48 -448 WIRE -32 -352 -48 -352 WIRE -480 -336 -480 -432 WIRE -416 -336 -480 -336 WIRE 80 -336 80 -448 WIRE 80 -336 32 -336 WIRE 144 -336 80 -336 WIRE 208 -336 144 -336 WIRE -320 -320 -320 -432 WIRE -320 -320 -352 -320 WIRE -288 -320 -320 -320 WIRE -176 -320 -176 -352 WIRE -176 -320 -208 -320 WIRE -144 -320 -176 -320 WIRE -48 -320 -64 -320 WIRE -32 -320 -48 -320 WIRE -416 -304 -448 -304 WIRE -48 -304 -48 -320 WIRE 144 -304 144 -336 WIRE -448 -272 -448 -304 WIRE -48 -224 -48 -240 WIRE 144 -192 144 -224 WIRE -432 -80 -464 -80 WIRE -320 -80 -352 -80 WIRE -1296 -64 -1584 -64 WIRE -1024 -64 -1296 -64 WIRE -800 -32 -1552 -32 WIRE -48 -16 -176 -16 WIRE 80 -16 -48 -16 WIRE -464 16 -464 -80 WIRE -432 16 -464 16 WIRE -320 16 -320 -80 WIRE -320 16 -368 16 WIRE -176 16 -176 -16 WIRE -48 80 -48 -16 WIRE -32 80 -48 80 WIRE -1552 96 -1552 -32 WIRE -1520 96 -1552 96 WIRE -1328 96 -1328 -432 WIRE -1328 96 -1360 96 WIRE -1264 96 -1328 96 WIRE -992 96 -1104 96 WIRE -720 96 -832 96 WIRE -592 96 -720 96 WIRE -464 96 -464 16 WIRE -464 96 -512 96 WIRE -416 96 -464 96 WIRE 80 96 80 -16 WIRE 80 96 32 96 WIRE 144 96 80 96 WIRE 208 96 144 96 WIRE -320 112 -320 16 WIRE -320 112 -352 112 WIRE -288 112 -320 112 WIRE -176 112 -176 80 WIRE -176 112 -208 112 WIRE -144 112 -176 112 WIRE -48 112 -64 112 WIRE -32 112 -48 112 WIRE -416 128 -448 128 WIRE -48 128 -48 112 WIRE 144 128 144 96 WIRE -1584 144 -1584 -64 WIRE -1520 144 -1584 144 WIRE -1296 144 -1296 -64 WIRE -1264 144 -1296 144 WIRE -1072 144 -1088 144 WIRE -1024 144 -1024 -64 WIRE -992 144 -1024 144 WIRE -800 144 -800 -32 WIRE -800 144 -816 144 WIRE -720 160 -720 96 WIRE -704 160 -720 160 WIRE -640 160 -656 160 WIRE -592 160 -640 160 WIRE -448 160 -448 128 WIRE -1776 192 -1776 64 WIRE -1680 192 -1680 64 WIRE -1584 192 -1584 144 WIRE -704 192 -736 192 WIRE -48 208 -48 192 WIRE 144 240 144 208 WIRE -1440 256 -1440 192 WIRE -592 256 -592 160 WIRE -592 256 -1440 256 WIRE -1776 320 -1776 272 WIRE -1680 320 -1680 272 WIRE -1680 320 -1776 320 WIRE -1584 320 -1584 272 WIRE -1584 320 -1680 320 WIRE -1072 384 -1072 144 WIRE -736 384 -736 192 WIRE -736 384 -1072 384 WIRE -592 384 -736 384 WIRE -464 384 -512 384 WIRE -432 384 -464 384 WIRE -320 384 -352 384 WIRE -1776 400 -1776 320 WIRE -48 464 -176 464 WIRE 80 464 -48 464 WIRE -464 480 -464 384 WIRE -416 480 -464 480 WIRE -320 480 -320 384 WIRE -320 480 -352 480 WIRE -176 496 -176 464 WIRE -48 560 -48 464 WIRE -32 560 -48 560 WIRE -464 576 -464 480 WIRE -416 576 -464 576 WIRE 80 576 80 464 WIRE 80 576 32 576 WIRE 144 576 80 576 WIRE 208 576 144 576 WIRE -320 592 -320 480 WIRE -320 592 -352 592 WIRE -288 592 -320 592 WIRE -176 592 -176 560 WIRE -176 592 -208 592 WIRE -144 592 -176 592 WIRE -48 592 -64 592 WIRE -32 592 -48 592 WIRE -416 608 -448 608 WIRE -48 608 -48 592 WIRE 144 608 144 576 WIRE -448 640 -448 608 WIRE -48 688 -48 672 WIRE 144 720 144 688 FLAG -1776 400 0 FLAG -48 688 0 FLAG -1776 64 +3 FLAG -1680 64 -3 FLAG 0 544 +3 FLAG 0 608 -3 FLAG -48 208 0 FLAG 0 64 +3 FLAG 0 128 -3 FLAG -48 -224 0 FLAG 0 -368 +3 FLAG 0 -304 -3 FLAG 144 240 0 FLAG 144 720 0 FLAG 144 -192 0 FLAG -448 160 0 FLAG -384 80 +3 FLAG -384 144 -3 FLAG -448 640 0 FLAG -384 560 +3 FLAG -384 624 -3 FLAG -448 -272 0 FLAG -384 -352 +3 FLAG -384 -288 -3 FLAG 208 -336 PHASE1 FLAG 208 576 PHASE3 FLAG 208 96 PHASE2 SYMBOL Digital\\dflop -1440 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=0 SYMATTR InstName A1 SYMBOL voltage -1584 176 R0 WINDOW 3 24 104 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 0 12 104 Left 2 SYMATTR Value PULSE(3 -3 0 1E-6 1E-6 .008333 .016666) SYMATTR InstName V1 SYMBOL Digital\\dflop -1184 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=1 SYMATTR InstName A2 SYMBOL Digital\\dflop -912 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=0 SYMATTR InstName A3 SYMBOL cap -64 608 R0 WINDOW 0 -41 34 Left 2 WINDOW 3 -88 65 Left 2 SYMATTR InstName C7 SYMATTR Value 11nF SYMBOL cap -192 496 R0 WINDOW 0 -55 -2 Left 2 WINDOW 3 -87 35 Left 2 SYMATTR InstName C8 SYMATTR Value 22nF SYMBOL res -192 576 R90 WINDOW 0 65 62 VBottom 2 WINDOW 3 70 60 VTop 2 SYMATTR InstName R7 SYMATTR Value 1meg SYMBOL res -48 576 R90 WINDOW 0 -30 53 VBottom 2 WINDOW 3 -28 56 VTop 2 SYMATTR InstName R8 SYMATTR Value 1meg SYMBOL cap -64 128 R0 WINDOW 0 -41 34 Left 2 WINDOW 3 -88 65 Left 2 SYMATTR InstName C2 SYMATTR Value 11nF SYMBOL cap -192 16 R0 WINDOW 0 -55 -2 Left 2 WINDOW 3 -87 35 Left 2 SYMATTR InstName C3 SYMATTR Value 22nF SYMBOL res -496 80 R90 WINDOW 0 -30 60 VBottom 2 WINDOW 3 -27 57 VTop 2 SYMATTR InstName R2 SYMATTR Value 51k SYMBOL res -48 96 R90 WINDOW 0 -30 53 VBottom 2 WINDOW 3 -28 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 1meg SYMBOL cap -64 -304 R0 WINDOW 0 -41 34 Left 2 WINDOW 3 -88 65 Left 2 SYMATTR InstName C4 SYMATTR Value 11nF SYMBOL cap -192 -416 R0 WINDOW 0 -55 -2 Left 2 WINDOW 3 -87 35 Left 2 SYMATTR InstName C5 SYMATTR Value 22nF SYMBOL res -192 -336 R90 WINDOW 0 65 62 VBottom 2 WINDOW 3 70 60 VTop 2 SYMATTR InstName R4 SYMATTR Value 1meg SYMBOL res -48 -336 R90 WINDOW 0 -30 53 VBottom 2 WINDOW 3 -28 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 1meg SYMBOL Opamps\\LT1677 0 32 R0 SYMATTR InstName U1 SYMBOL res 128 112 R0 SYMATTR InstName R6 SYMATTR Value 1k SYMBOL res 128 592 R0 SYMATTR InstName R9 SYMATTR Value 1k SYMBOL res 128 -320 R0 SYMATTR InstName R10 SYMATTR Value 1k SYMBOL Opamps\\LT1677 0 512 R0 SYMATTR InstName U2 SYMBOL Opamps\\LT1677 0 -400 R0 SYMATTR InstName U3 SYMBOL res -192 96 R90 WINDOW 0 65 62 VBottom 2 WINDOW 3 70 60 VTop 2 SYMATTR InstName R12 SYMATTR Value 1meg SYMBOL Opamps\\LT1677 -384 48 R0 SYMATTR InstName U4 SYMBOL cap -368 0 R90 WINDOW 0 -32 36 VBottom 2 WINDOW 3 -31 29 VTop 2 SYMATTR InstName C6 SYMATTR Value 220nF SYMBOL res -336 -96 R90 WINDOW 0 -32 64 VBottom 2 WINDOW 3 -32 67 VTop 2 SYMATTR InstName R13 SYMATTR Value 1meg SYMBOL Opamps\\LT1677 -384 528 R0 SYMATTR InstName U5 SYMBOL cap -352 464 R90 WINDOW 0 -34 37 VBottom 2 WINDOW 3 -36 30 VTop 2 SYMATTR InstName C9 SYMATTR Value 220nF SYMBOL res -336 368 R90 WINDOW 0 -47 62 VBottom 2 WINDOW 3 -37 62 VTop 2 SYMATTR InstName R14 SYMATTR Value 1meg SYMBOL Opamps\\LT1677 -384 -384 R0 SYMATTR InstName U6 SYMBOL cap -352 -448 R90 WINDOW 0 -37 34 VBottom 2 WINDOW 3 -33 30 VTop 2 SYMATTR InstName C10 SYMATTR Value 220nF SYMBOL res -496 368 R90 WINDOW 0 -30 51 VBottom 2 WINDOW 3 -29 51 VTop 2 SYMATTR InstName R17 SYMATTR Value 51k SYMBOL res -496 -448 R90 WINDOW 0 -37 62 VBottom 2 WINDOW 3 -36 63 VTop 2 SYMATTR InstName R18 SYMATTR Value 51k SYMBOL res -336 -544 R90 WINDOW 0 -47 62 VBottom 2 WINDOW 3 -37 62 VTop 2 SYMATTR InstName R19 SYMATTR Value 1meg SYMBOL voltage -1776 176 R0 WINDOW 0 111 105 Left 2 WINDOW 3 24 96 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value 3 SYMBOL voltage -1680 288 R180 WINDOW 0 53 7 Left 2 WINDOW 3 24 16 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value 3 SYMBOL Digital\\and -672 112 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A4 TEXT -1744 360 Left 2 !.tran 0 1s 0 1ms startup uic

Oops, I thought it did. hmm.

state: count

I guess it needs to be done the hard way with three flip-flops and a bunch of and gates to decode it and one to keep it sane,

picking resistors will be easier though

Version 4 SHEET 1 1624 1476 WIRE -624 -608 -1328 -608 WIRE -528 -608 -560 -608 WIRE -512 -608 -528 -608 WIRE -416 -608 -448 -608 WIRE -624 -576 -1072 -576 WIRE -416 -544 -416 -608 WIRE -336 -544 -416 -544 WIRE -624 -512 -1312 -512 WIRE -624 -480 -1056 -480 WIRE -528 -480 -560 -480 WIRE -416 -480 -416 -544 WIRE -416 -480 -448 -480 WIRE -1056 -384 -1056 -480 WIRE -624 -384 -1056 -384 WIRE -528 -384 -560 -384 WIRE -512 -384 -528 -384 WIRE -416 -384 -448 -384 WIRE -624 -352 -800 -352 WIRE -416 -320 -416 -384 WIRE -336 -320 -416 -320 WIRE -1072 -288 -1072 -576 WIRE -624 -288 -1072 -288 WIRE -624 -256 -816 -256 WIRE -528 -256 -560 -256 WIRE -416 -256 -416 -320 WIRE -416 -256 -448 -256 WIRE -1312 -160 -1312 -512 WIRE -624 -160 -1312 -160 WIRE -528 -160 -560 -160 WIRE -512 -160 -528 -160 WIRE -416 -160 -448 -160 WIRE -816 -128 -816 -256 WIRE -624 -128 -816 -128 WIRE -608 -128 -624 -128 WIRE -416 -96 -416 -160 WIRE -336 -96 -416 -96 WIRE -1328 -64 -1328 -608 WIRE -624 -64 -1328 -64 WIRE -800 -32 -800 -352 WIRE -624 -32 -800 -32 WIRE -528 -32 -560 -32 WIRE -416 -32 -416 -96 WIRE -416 -32 -448 -32 WIRE -1296 -16 -1584 -16 WIRE -1024 -16 -1296 -16 WIRE -800 16 -800 -32 WIRE -800 16 -1552 16 WIRE -1552 96 -1552 16 WIRE -1520 96 -1552 96 WIRE -1328 96 -1328 -64 WIRE -1328 96 -1360 96 WIRE -1264 96 -1328 96 WIRE -1072 96 -1072 -288 WIRE -1072 96 -1104 96 WIRE -992 96 -1072 96 WIRE -816 96 -816 -128 WIRE -816 96 -832 96 WIRE -768 96 -816 96 WIRE -1584 144 -1584 -16 WIRE -1520 144 -1584 144 WIRE -1312 144 -1312 -160 WIRE -1312 144 -1344 144 WIRE -1296 144 -1296 -16 WIRE -1264 144 -1296 144 WIRE -1072 144 -1088 144 WIRE -1056 144 -1056 -384 WIRE -1056 144 -1072 144 WIRE -1024 144 -1024 -16 WIRE -992 144 -1024 144 WIRE -800 144 -800 16 WIRE -800 144 -816 144 WIRE -1776 192 -1776 64 WIRE -1680 192 -1680 64 WIRE -1584 192 -1584 144 WIRE -1072 256 -1072 144 WIRE -1072 256 -1280 256 WIRE -1440 288 -1440 192 WIRE -1344 288 -1440 288 WIRE -768 288 -768 96 WIRE -768 288 -1280 288 WIRE -1776 320 -1776 272 WIRE -1680 320 -1680 272 WIRE -1680 320 -1776 320 WIRE -1584 320 -1584 272 WIRE -1584 320 -1680 320 WIRE -1104 368 -1120 368 WIRE -1776 400 -1776 320 FLAG -1776 400 0 FLAG -1776 64 +3 FLAG -1680 64 -3 FLAG -336 -544 Ph1 FLAG -336 -320 Ph2 FLAG -336 -96 Ph3 SYMBOL Digital\\dflop -1440 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=0 SYMATTR InstName A1 SYMBOL voltage -1584 176 R0 WINDOW 3 24 104 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 0 12 104 Left 2 SYMATTR Value PULSE(3 -3 0 1E-6 1E-6 .008333 .016666) SYMATTR InstName V1 SYMBOL Digital\\dflop -1184 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=1 SYMATTR InstName A2 SYMBOL Digital\\dflop -912 48 R0 WINDOW 3 8 168 Invisible 2 SYMATTR Value trise 1e-7 tfall 1e-7 vhigh 3 vlow -3 ic=0 SYMATTR InstName A3 SYMBOL voltage -1776 176 R0 WINDOW 0 111 105 Left 2 WINDOW 3 24 96 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value 3 SYMBOL voltage -1680 288 R180 WINDOW 0 53 7 Left 2 WINDOW 3 24 16 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value 3 SYMBOL Digital\\and -1312 336 R180 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A4 SYMBOL Digital\\and -592 -656 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A5 SYMBOL Digital\\and -592 -560 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A6 SYMBOL res -432 -624 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 100k SYMBOL res -432 -496 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 100k SYMBOL Digital\\and -592 -432 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A7 SYMBOL Digital\\and -592 -336 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A8 SYMBOL res -432 -400 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 100k SYMBOL res -432 -272 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 100k SYMBOL Digital\\and -592 -208 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A9 SYMBOL Digital\\and -592 -112 R0 WINDOW 3 0 0 Invisible 2 SYMATTR Value trise 1e-5 tfall 1e-5 vhigh 3 vlow -3 SYMATTR InstName A10 SYMBOL res -432 -176 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 100k SYMBOL res -432 -48 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value 100k TEXT -1810 424 Left 2 !.tran .5

to

rate

scrambled

about

or perhaps use a 4022 and OR outputs 7 and 8 together and feed that into the reset pin. It uses half as many chips as doing it the other way.

state count

possible partial reset states: 0001 Q8 high 0010 Q7 high on the other hand the input buffer might be slow enough that state 0001 will never occur

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