has anyone used mathstar field programmable object arrays?

Just wondered if anyone here has used these devices... I want to do embedded computer vision applications and it sounds like they are a pretty good fit. But I have no idea about the difficulty of using the tools and getting algorithmic concepts into hardware...

any feedback would be great.

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We've had some experience with these, but to date most of the work has been done by "software guys" who have had some trouble getting the hang of the programming paradigm. I think if your background is in FPGA and other hardware design you'll have an easier time of it.

I like to think of the FPOA as an FPGA without the main fabric, only DSP and memory blocks. This is a bit of simplification since the ALU's in the FPOA are really little programmed sequencers, but it gets across the granularity of the part. Don't expect to write some very high level code that is magically mapped into a quantity of these blocks as for example your VHDL or Verilog might fit into Slices in Xilinx FPGA's. In that respect the tools are relatively primitive, more like FPGA editor than anything else I can think of.

That being said, if you can partition your algorithm into pieces that fit the blocks of the array, this part is much easier to meet timing with than FPGA's. The headaches come in the interconnect where you are forced to add pipeline delays based on route length. There is some support in the tools to help deal with this, but again it isn't as "pushbutton" as we've become accustomed to with FPGA tools. Other issues arise when your data flow is constrained by peripherals that require data to enter or exit the part on particular columns or rows, and by the use of MAC and register file blocks that are more sparse throught he array than the ALU's.

The design entry runs under Visual Elite, which has some nice features and simple built-in simulation. However the top level of your design is pretty much a schematic calling up the block elements of the array. If you can give an example of the kind of algorithms you might do in the part I might be able to let you know what to expect for "level of pain" to get it into the FPOA.

Regards, Gabor

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I have lots of experience with altera and some with xilinx FPGAs. I am pretty good with VHDL.

The algorithms I might want to implement: optical flow projective image warp mpeg encode and decode

neural network or support vector machine image histogram

block matching algorithms (such as those in mpeg).

- to name a few.

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unless their tools have improved very significantly in the past couple years, I think you are going to be dissappointed with the amount of detail work you are going to need to do. Their tools are not in the same league as Xilinx and Altera. It is much more like working in the old Xilinx XDS back around 1990 (much like doing the design under today's FPGA Editor).

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Ray Andraka

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