Debouncing....at About 1Mhz

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Even if the period of the input signal is known, a glitch on that
line happening after the wait state times out but before the next
valid edge comes along will cause a false output.

Fortunately in my app, I'm not expecting glitches in between the fuzz to fuzz period (The steady state period.).

D from BC

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Lucky you! ;)

From your earlier posts I understand that while the steady-state
period may vary, the fuzzy period will always be

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JF

Correct.

Correct.

Not until I have all the apostrophes correct. :) But seriously.. I'd like to do a bunch of sims first and get the debounce circuit installed. Then I can post a schematic and demonstrate how the debounce circuit is necessary and unavoidable.

Happens to me often, but hopefully not this time..

D from BC

There's no reason to supress them. The first clock strobes the correct logic level into the flipflop, and the following clocks don't change it. It does exactly what the OP requested.

You're flailing. No quad xor gate processing logic levels, in any reasonable system, is going to break nearby components. You make it sound like no digital system can ever work.

The comparator is already making all those transitions. All I'm doing is running them through one more ssi package. That seems to scare you for some reason; it doesn't scare me.

The same-polarity output comes out of qbar. Big deal. The concept was free, and works.

Couldn't say. I haven't lost.

John

Fred Bartoli snipped-for-privacy@free.fr posted to sci.electronics.design:

OW. That is ugly and painful just to think of.

The original Signetics PLAs were programmed by marking Xs on a form to indicate where to blow fuses. It wasn't all that bad.

I think one could program a PAL or even a 22V10 at the fuse level without extreme agony, although there are easier ways to do it.

John

John Larkin snipped-for-privacy@highNOTlandTHIStechnologyPART.com posted to sci.electronics.design:

Personally i would use a 9602 and a 7400 connected as a gated rs flip-flop. R of 5K and c of 10 pf or so.

Schematic?

John

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Fools rush in where angels fear to tread?

You do know that if, in a peculiar window in time you have a single
10ns edge which generates a certain spectral output, then generating
ten 10ns edges in that same window will result in that spectrum
being generated ten times, yes?

Point being that one hit might not be enough to disrupt something
that ten would.  It\'s always best to minimize noise, wouldn\'t you
agree?

Fools invent objections that are not real, and that they cannot estimate realistically, for reasons that are not rational.

No. That's stupid. I design 100+ MHz logic all the time, with tens of thousands of gates, and it always works. And I don't work at minimizing the number of transitions in each gate. My logic doesn't "disrupt" anything.

It's not wrong; it inverts. I never said it didn't. Somebody pointed out that it does, and I instantly agreed. So use Qbar already if you don't want inversion.

I designed, sketched, photographed, and posted a simple, fast, reliable circuit that does exactly what the OP specified, all in about

90 seconds. And as someone else pointed out, it inverts, which I agree with, and that the non-inverted signal is available at Qbar.

You designed and posted, and apparently spent hours simulating and tuning, a slow, complex, likely unreliable hairball that does not meet his specs.

I rest my case; let the jury decide.

John

I like your XOR circuit. However from the OP's remarks I can't make out how he wants the circuit to react on a single, very short pulse. Yours won't react at all. The OP wants short propagation, which means that the circuit must trigger on the first transition no matter what and then mask out trailing glitches. A circuit that does that will of course make broad pulses from narrow ones, or flip once and then get stuck in the wrong state. If glitches can only occur following a transition (like in a mechanical switch), there are better circuits than yours. If spurious glitches can occur anytime, your circuit is best because it filters those out. The price decide whether a pulse was spurious or not.

robert

It's a neat circuit (JL circuit) ...and works great.....once it gets going. :)

If tau is large and the cct gets 1Mhz, there is a start up delay. If tau is made small to reduce the start up delay, the cct malfunctions at some lower frequency.

(In my OP, I didn't mentioned anything about quick startup operation. Oops...)

Heck! I'm just happy to see the circuit and it's been an inspiration for other circuits.

For example.. I replaced the RC with a Dff to hold the previous 'sampled' steady state. It now works at any transition at any period (varying duty)*.

*Within cct limitations.

When I post problems on SED, I'm really just looking for sparks to start the fire.. When the fire gets going it's usually like a smokey pile of damp leaves... :) D from BC

The RC delay should be somewhat more than the expected bounce time. It has better dynamics if the RC is replaced by a critically-damped rlc, which has a better delay:recovery ratio. It should work at arbitrarily low rep rates, as long as the bounce time doesn't extend.

Exactly. Circuits are ideas to be played with. You never know where they'll lead.

There are always a few guys standing around with buckets of dirty water, ready to throw them on anything that looks like a spark.

John

My understanding was that this was to clean up comparator chatter, with minimal prop delay from the first transition of an erratic but time-limited burst. I think it does that.

John

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So you think that a quiet system isn't better than a noisy one?

I think the FCC would disagree with you.

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That fits you re. my circuit perfectly!

That cleans the input rising edge but propagates all the falling-edge glitches. I don't think that's compatible with D's first-post requirements. The output falling edge will be nasty, too, which is fixable with another resistor.

John