Breadboarded 74HCT7046 PLL very unstable

What do you then do with the pulses?

Study my presentation. It creates a local clock locked to incoming data, but requires a local oscillator running at X-times incoming, "X" dependent on the phase resolution you need. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.

I had trouble using that @#$%^& for a 40kHz distance finder. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.

At 40kHz you'd have to pay close attention to wire dress, and anything above about 1k-ohm impedance you'd have to pay attention to all the parasitic capacitance. If you have a pretty good idea of what you want, you can do better with a 1-day turn board with plenty of elbow room for breadboarding. I do this with a mesh ground because it's easy to cut out islands or leave as-is; I've got prototype boards with two- or three-chip subsections dead-bugged to the expanses of extra ground plane.

I keep the protoboards around for checking out poorly documented chips, for whomping up circuits for which I don't trust my simulation ability, and for the odd low-frequency circuit (which I do run into, inside of control loops). Oddly enough they're pretty good at trying out RF oscillators to see if they'll start reliably. The better I get at simulation, the more they sit there gathering dust.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

Um.. I was using the PFD. Why can't I use it?

Something to do with the lack of phase-detect transitions when the loop is locked and there's no input signal?

Thanks,

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Phil.
usenet10@philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year

Working fine here now; must have been my 3G modem playing silly beggars.

Thanks,

--
Phil.
usenet10@philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year

Yup. Miss a transition --> loop unlocks.

Cheers

Phil Hobbs

Am I right in thinking that this applies to Stripboard (aka Veroboard) too?

For those who haven't seen it -- stripboard is an FR2 (phenolic) board with holes on a 0.1in (2.54mm) grid, and wide (about 10-20mil shy of fully shorted) copper tracks running horizontally across. You cut tracks and add wires to route the signals around.

I'll have to have a play with "manhattan" / deadbug construction later this week. In the meantime, I think I might order some low-value 0805- size NP0/C0G ceramic capacitors to play with...

Thanks,

--
Phil.
usenet10@philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year

OK, that would be Design Variant #2 -- I had a 13.875MHz crystal rigged up in a HCT04-based buffered TTL oscillator circuit, with a BB419 varactor tied in to shift the frequency based on an incoming voltage. Catch is, this voltage needs to go to 20V to get the BB419's capacitance low enough to go much over 13.875. If memory serves, the frequency varied from about

13.850 to 13.900MHz over a range of 0V to 20V in.

Thanks,

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Phil.
usenet10@philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year

On a sunny day (27 Dec 2010 19:44:01 GMT) it happened Philip Pemberton wrote in :

Z80 board 4 MHz on 2.54 mm eurocard: ftp://panteltje.com/pub/s/wiring2.jpg

18 MHz: ftp://panteltje.com/pub/z80/graphics_card_bottom.jpg ftp://panteltje.com/pub/z80/graphics_card_top.jpg 38 MHz video ADC DAC connected to a 50 MHz FPGA board: ftp://panteltje.com/pub/2h/alles2.jpg 64 MHz PIC, bu tinternal clock at 8MHz:

I think you should only worry above 200 MHz or so on veroboard. I have build TV modulators on it. With normal resistors, not SMD.

Just use common sense when wiring it and in the layout.

Rats.

I have found a nice PDF with some notes on phase detectors and clock recovery:

Moreira, Paulo. Introduction to Integrated DLLs and PLLs.

The one I'm referring to is "PLL Applications". Pages 6 onwards explain the Hogge, Alexander and Modified Triwave phase detectors. I think I might have a go at building a Hogge detector in a bit and see if that works any better...

And the VCXO is going back in too, if only because it's more stable than the RC VCO and has a more useful frequency range...

Thanks,

--
Phil.
usenet10@philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year

The PFD is a three-state detector; you can think of it as trying to keep a count of the number of excess edges of one clock or the other. But with only three states it can't remember much, so it can only count -1,

0 and 1. If it's at zero and an edge comes in, it either goes to -1 or 1 depending on which clock triggered it. If it's at -1 and the 'down' clock hits it, it stays at -1. If it's at +1 and the 'up' clock hits it, it stays at +1. So when you give it a clock with all the edges in place (from the oscillator), and compare that to a clock with missing edges (your signal converted to RZ with your pulse-making circuit), it keeps wanting to count down, down, down -- and pulls your oscillator down.

You need a circuit that only tweaks the VCO value when there is a transition in the data.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

That Hogge phase detector should work fine. In a way it's a digitized Costas loop as Jim was suggesting, except that it's really only useful when you have a good signal to noise ratio (which you should).

Note that loop stability becomes problematical when you're doing clock recovery -- your phase detector gain varies depending on the number of transitions, and your loop stability can be degraded by either a too-high or a too-low phase detector gain. So you have to design around that. Fortunately you have a guaranteed minimum number of phase transitions, which eases your task considerably.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

You should only need PPMs of pull range to sync to video.

John

Just tested again with a new build of the circuit. Centre frequency is

13.875MHz. With the varactor input grounded I get 13.8748MHz, and with it wired to 5V I get 13.8753MHz.

Looks like I might not need the amplifier and 20V supply after all.

Note: My method is not phase DETECTION, it's actually phase JERKING ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.

yeh, the spec posted said +/-25ppm on the 6.9375MHz bit rate

I'd do it all digitally, 12Mbit USB is done with 48MHz sampling usually using both edges of a 24MHz, and that is for +/-0.25% and max of seven bit periods between transitions

-Lasse

[Crappy white plastic breadboards]

It probably is... Plasternack's booklet on oscillator design has example circuits up to something like 100MHz being built on solderless breadboards like that!

---Joel

Generally yes... although there *are* boards like that out there that *do* have a complete plane (punctuated by the "signal" holes -- which are all isolated; sometimes you'll get a few busses down the edge of the board, though) on one or both sides.

They tend to be rather more expensive than the "regular" type of board, though... mostly due to low volumes, I expect, since it doesn't seem like it should cost anything more to produce them!

Dead bug construction on a solid copper plane -- using donuts, Kapton tape, or similar to create small isolated islands when needed -- works quite well.

---Joel

haven't tried it but it looks interesting if you work with big enough parts:

-Lasse