For several reasons a need very low jitter on some of my outputs. I was thinking of using LVDS for my I/Os and of course I do not consider using a clock manager. Do you have an idea of the order of magnitude of jitter one can get? What fpga would you recomend for a low cost small design?
Here's a signal that has made three independent non-trivial in/out passes through a Spartan3, plus passed through six external SSI CMOS chips. Total jitter of that whole chain is below 20 ps RMS.
ftp://jjlarkin.lmi.net/Jitter3.jpg
We were fairly impressed. Spartans are like having a few thousand 10KH ECL gates on a $20 chip.
I've just built a fractional-N synthesizer using a Spartan 3. The reference frequency comes from an LVDS-output crystal oscillator. The VCO frequency is fed into the opposite side of the FPGA using an LVDS-output comparator and the (AD9901 style) PFD output from the FPGA to the loop filter is also LVDS on a third physical side.
Inside the FPGA, the VCO divider and reference divider are on local clocks confined to small regions around the pads where they enter. BUFGCE primitives are used to gate the clocks so I only send edges over the global clock network when a divider resets. The AD9901 PFD ensures that the VCO and reference divider outputs are 180 degrees out of phase.
Some years ago, I built a cruder fractional-N synth using a 5V Altera PLCC84 CPLD. It worked quite well, but there was some interation between the VCO and reference frequencies which caused integer-N boundary spurs. I see no trace of these spurs on my new Spartan 3 design, and the phase noise is much lower. I'm seeing around -95 dBc/Hz at 100 Hz offsets at the moment; and I haven't finished tweaking things yet.
They say don't attempt analogue functions in FPGAs; but it seems to work remarkably well in the Spartan 3, which is fully static when I'm not clocking it.
Can you tell us more about that? Sounds very interesting. As long as it doesn't rely on really undocumented parameters like leakage currents, or goes away when the family gets discontinued (one reason I don't like FPGA much).
Probably of the exothermic kind where the smoke alarms kick in and the sprinkler system comes on :-)
You mean the stuff that can change without warning? One place where I worked had a design that was using FET transistors to control the current to control the current to an LED backlight, V in and I out. Heck, they publish a curve for that right? That would be a *typical* curve. After using this part for some years, the circuit stopped working right with a dim backlight. The FET maker had "improved" their process and changed the threshold voltage just a bit, still within spec, but not the same curve. So now the ROM values for the DAC didn't let enough current pass.
It's not likely that the LVDS circuit would be changed at any point in the future... I guess that is where the "trouble" part comes in.
I asked the Altera rep (actually from Arrow) to check on that for me. It seemed like a possibility. I have a bunch of ideas if this is really a possibility (noise and such).
I may try? So far the other engineers don't think it can be done. We'll see. ;-)
Using a fet open-loop as a linear current controller is more risk that I'm willing to take... especially when it's easy to do it right.
It's a matter of calculated risk. If a part behaves in some useful but undocumented way, and the process is likely stable, the performance may be worth the risk. I think I've been burned more times by semiconductors being discontinued than by their behavior changing.
On a thing we're doing now, we're using some SOT-89 power phemts as switches. These are RF parts, and are barely specified for DC behavior; hell, lots of RF fets are totally unspecified for DC behavior. So we're including a place to install a trimpot in case the transfer curves don't stay put.
where AK and KA are schottky diodes feeding an opamp integrator (P+I control) thing, and the up/down things pulse in the obvious polarities. The fpga outputs are hard and fast, not tri-state, and overlap a good bit. No deadband, fast as all getout, low phase noise.
Oh, I do a lot of unorthodox stuff. Using 74HCU or CD4000 in analog circuits, switcher FETs in servos, RF parts for digital functions and so on. I am just curious what can be done with an FPGA in that respect.
A long time ago I was looking into using the old Intel CPLD series that way because of they microamp capabilities. Boy was I glad I didn't, shortly after they ditched the whole line. Thing is, most of my designs are targeted for more than a decade in production. And no trimpots or calibration allowed unless that can be automated.
On a sunny day (Sat, 28 Mar 2009 17:38:50 -0700) it happened Joerg wrote in :
Although I am by no means an FPGA expert, I have done some funny things with my Spartan 2 FPGA board. For example did video out with a simple R2R network connected to some output pins (8 bits), video conversion from 50Hz V and 15625Hz H to
50Hz V and 31250Hz H, for display on a VGA monitor, (with an ADC for input), and similar stuff. Of course using a real DAC (I have now) is much better. Simple pulse things, like John does in that example to charge an integrator, work, but analog is not the field for FPGAs, the 'right' way is to digitise, process digitally, and then convert to analog again. Like for filters, for example a nice lowpass in Verilog for video is only a few lines of code, etc. It seems Altera has a _lot_ of real nice video stuff, compete codecs, etc. For sure I would go Altera if I needed something like that for video again. Also Xilinx stuff is either not there, and cannot be bought from their online shop (at least it was that way a while ago).
That is the nice thing about digital processing, no trimmers, no tolerances, no monte carlos. You may want an FPGA with onboard flash.. Just make sure you can actually get the chips from several sources, watch the price too. The Altera soft runs in MS windows and in Linux in Wine. The Xilinx stuff has a Linux version that also works, and the tools have a command line interface that can be used from a script,
Packages are small, you need a development (or more then one) board for each FPGA. And learning a HDL, Verilog or VHDL, or both, will take a lot of your time. That needs to be calculated in too.
Don't need Monte Carlo, there's an Indian gambling place down the road but I don't gamble anyhow.
Oh, wait ...
Flash? That's frowned upon as morally indecent in the more conservative regions out here :-)
That's the two main problems. FPGA are usually all single-sourced (having several distributors doesn't count) and expensive. Seen too many purchasing nightmares there.
Technically single-sourced, yes. As long as you stay away from the quirks (LVDS performance can be considered a "quirk" ;), unique features, and IP cores, they're pretty easy to substitute. The costs have come *way* down, as well. $5-$20 buys a lot of logic these days.
No, FPGAs aren't the right answer for every question but you're not going to buy that function, or anything near it, for less. We have a pile of crap logic that I'd *love* to sweep into a FPGA. It would save a lot of money and grief. If I was convinced I could do a decent delta sigma modulator I'd do even more.
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