Assuming you've already checked the likely suspects, here are some random thoughts on jitter troubleshooting. (FWIW, many of these will break other things and are not suggested as a fix, just a troubleshooting aid )
A) Try to distinguish whether the DCM input clock is affected when the I/O switches; or, if the DCM itself is being affected; or, if both are
- clock your DDR clock forwarding flop directly from the input clock, with no DCM: does it still get the jitters when the QDR I/O switching starts?
i.e. 100 Mhz input clock -> BUFG -> DDR output
( IIRC, you don't need to fiddle with DIFF_OUT buffers for global clock forwarding in V4 due to the already differential global clock distribution )
- if you have another clock input ( esp. in a quiet bank ), temporarily clock the QDR logic from that ( with and without DCM ) and see if the jitter changes
B) DCM Duct Tape
- LOC the DCM to the other DCM sites on the chip; see if that affects the jitter
Even if it's not an optimum LOC for the DCM because of the GCLK pin location, and there needs to be a long clock route to get there, putting the DCM on the other side of the chip away from I/O activity may help your jitter ( but not meet system timing )
- change FACTORY_JF as described in Answer Record 13756
If decide to try CLKFX, see AR 21594 and AR 18181 ( V2/S3 era advice, not sure how it applies to V4 )
- change DCM DESKEW_ADJUST to SOURCE_SYNCHRONOUS to turn off the internal DCM feedback delay element (more V2 era advice) ( see pages 4-5 of XAPP259 )
- Do you have any spare LVDS input/outputs elsewhere on the chip ? ( handy for clock troubleshooting )
- If you run a 'hammer' test 0000 FFFF instead of pseudorandom patterns on the QDR address/data lines, does the jitter get much worse and/or the DCM unlock ? ( also try changing the toggle rate, 1,2..N clocks )
FWIW, my S3 Starter Kit SRAM memory test that used a x2 DCM would unlock on hammer patterns, even with slow slew I/O meeting SSO limits, unless the DCM was LOC'd to the other side of the chip away from the SRAM I/O.
- Is the QDR interface bandwidth sufficient to allow for Asteroids vector generator emulation at 1080p resolution?