A good video about decoupling capacitors

Hmmm, yes, altough the PCB traces and the in-chip wiring probably dominate the effective ESL anyway.

I have two comments: Contrary to what he says, the ESL of 0804 components is about equal to that of 1206 caps, about half a nanohenry. I measured it.

And second, adding series resistors to capacitors *also* slightly more than doubles the total series inductance. And beware of inductive resistors! MELFs can be disastrous.

Jeroen Belleman

Cool, some common sense. Like he says, bigger caps are better.

There is so much nonsense about bypassing. The HoJo Black Magic book was typical silliness. The classic graph, 4 different value caps with four resonant dips, doesn't happen.

The best fast bypass cap is a pcb copper pour above a ground plane. Then add an occasional cap, most anywhere. I like 1 uF 50v 0805s. If via inductance is important up to a part,, add a topside cap or just more vias.

That's not based on theory, but measurements on real boards.

Most boards are over- and badly- bypassed.

Lots of big chips have serious amounts of internal bypass caps too. uPs and FPGAs. They might appreciate some gross external bypassing sorta nearby for big load steps, but the fast stuff is internal.

Why does anybody use melfs?

Seems improbable, or maybe there wasn't much seriously fast stuff in the current being by-passed.

Thirty years ago you could buy a bunch of capacitors designed for bypassing microwave frequencies, which went up to 1nF when I last looked, and they were surface mount and designed for the absolute minimum of internal inductance. I suppose modern surface mount 100nF parts might do as well if the voltage allowed a very thin single layer construction, but I'm dubious.

My suspicion back then was that the biggest capacitor in a multi-capacitor stack was there more to contribute it's ESR to damping any resonances than for the additional capacitance it offered.

Am 02.09.25 um 01:55 schrieb john larkin:

Because they can survive lots of impulse power? And not all of them are trimmed in inductor fashion.

Gerhard

I had a box full. They're a nuisance. Too inductive and they roll everywhere. They look pretty though.

Jeroen Belleman

Am 01.09.25 um 22:53 schrieb Klaus Kragelund:

No it isn't. 100nF won't give you anything in a

Different capacitors DO work. Take a look on page 14 of

(maybe I should update my web site every 10 years?)

What counts at really high frequencies is the impedance of the power planes. The caps just recharge the power plane and the more they are removed from the BGA the bigger they can be. But not under the BGA.

Cheers, Gerhard

ps

Good books: Howard Johnson/Martin Graham: Prentice Hall High speed digital design - a handbook of black magic and High speed signal propagation - advanced black magic Both can ignite flame wars, but when I measured it they were right.

This is in a competitor's product. I'm glad that I fired the guy who did this.

The HoJo book is half nonsense. If you can tell which half is which, you don't need the book.

Why is he looking at frequencies lower than ~ 200 MHz with a VNA? That lil test strip is not a transmission line down there.

In the video he made a specific point that above 1GHz could be a different case all together

And that's the problem with many EMC gurus. They sound like they got the right answers, but no measurements to back it up

I like the Feranec videos, since he actually backs most of the stuff up with simulations

All maybe true but I don't really understand the Youtube guy's methodology. Below about 200 MHz that strip of transmission line isn't a transmission line, it's just a kooky RLC filter like he's got in the sim, with 25(!) ohms of equivalent source resistance, of course it has kooky resonances. But what modern VRMs have 25 ohms of source resistance down there anyway?

At high frequency the strip looks more like a transmission line and those lumped elements in the sim are distributed, the ~500 MHz lumped element resonances from the sim aren't don't look nearly as bad when they're distributed on a non-zero length line. Nothing really alarming happening above 200 MHz with either topology.

I'm with you about time domain analysis here I think a frequency domain/VNA is the wrong tool to use here, I don't see much point to doing DC to daylight S11 sweeps on the same DUT. No idea if these tests are saying anything real about supply bypassing I don't usually run DC to daylight into a Vcc pin.

I've included some SMA connectors on board layouts to snoop the supply rails near big chips. It's educational.

Power planes and big caps work fine. Tantalums have very nice ESRs to damp voltage regulators and kill the Q of ceramic caps. Just don't expose them to high peak currents.

U.FL connectors are the ticket for that. They’re super cheap, and don’t take any more space than a SOT23.

Cheers

Phil Hobbs

If you mean "me" by "he"

1. That was not a VNA but a spectrum analyzer with tracking generator.

1. The interesting things happen already below 200 MHz.

2. The little test strip is a 50 Ohm transmission line with Gerland's double sided process as of 18 years ago. For today's JLCpcb process the trace would be 107 mil wide instead of 120. (added as a test structure to a payload board, really for playing with MiniCircuits MAR / ERA etc)

Yeah, we should seed our boards with more connectors to snoop things. And always have a way to measure supply currents.

I meant the guy in the Youtube video, I don't understand his methodology.

So? It doesn't have to be.

What a load of bollocks.

HP 3185, 3562, 4195, 35660, 89441A etc.