I have been having problems with the EKD 7.1 and the ML40x reference design for quite some time now. ISE/EDK 7.1 cannot meet the timing constraints on that design. I would really appreciate if anyone would post a solution to this problem?
for quite some time now. ISE/EDK 7.1 cannot meet the timing constraints on that design. I would really appreciate if anyone would post a solution to this problem?
On the MicroBlaze uClinux website I host a version of the ML401 reference design de-rated to 66MHz - this meets timing under ISE/EDK7.1.
Apart from modified clock generation and timing constraints, the system is trivially modified to make it uClinux capable, but fundamentally it's the same as Xilinx's original design. You'll also need to grab the uClinux BSP support files, or simply revert the "OS" section in the MSS file to standalone.
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