EDK 7.1 with ML401 (paging Antti)

I'm just about to start a small ML401 design,and am not sure if I should use EDK 6.3 or EDK 7.1.

Has anyone (Antti?) been able to get the reference design working with 7.1, or should I stick to 6.3?

Thanks

Reply to
Pete Fraser
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We've been working with the ML401 on EDK6.3 for a few months now, and apart from some minor glitches it mostly works OK. Make sure you read Xilinx solution record 20060 about XMD_LX and updated opb_mdm core, if you want to do MicroBlaze hardware debugging.

I installed EDK7.1-SP2 the other day, but haven't had a chance to try it yet. I did notice an updated ML401 reference design on xilinx.com, so presumably that should build out of the box.

One thing I did see, the newest XBD files (for Base System Builder) for the ML401 don't contain any timing constraints on the DDR nets and pins. So, it seems unlikely that any BSB projects targetting the ML401 will work with DDR. One of our students is checking this out, hopefully we'll know for sure in a day or two.

Cheers,

John

Reply to
John Williams

"Pete Fraser" schrieb im Newsbeitrag news: snipped-for-privacy@news.supernews.com...

Hi Pete,

me no - I do not happen to own any Xilinx developed Xilinx boards :( only vendor boards.

as of 7.1 - I would say go ahead, the issues I had are rather corner cases

1) XMD 7.1 SP1 + USB Cable + V4 combination does not work, possible fixed in EDK SP2 2) trouble with Microblaze 4.0, had to downgrade to 3.0

but otherwise the migration to 7.1 was rather painless

Antti

Reply to
Antti Lukats

FWIW

I have 6 fully working Microblaze designs under EDK6.2 (not 6.3). These are for various Virtex-II and Spartan-3 eval boards and our production hardware.

Under 7.1, several (2 or 3, I forget) of the 6 either fail to route or have large timing errors.

Each time a new 7.1 SP comes out, I give it a try on these working designs. So far, I am still with

6.2.

I would like to upgrade, as 7.1 has some nice new features, but not until it's more mature.

Reply to
joe4702

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