Field-Programmable Gate Arrays

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Worth reading in Field-Programmable Gate Arrays

The DLP from Texas Instruments...

For the switches that route signals in an FPGA, ideally, one wants something that does not delay signals, even if it ta...
4 comments posted 21yrs
posted by jsavard
4 comments posted 21yrs posted by jsavard

EDK: microblaze local memory

hi, I am trying to figure out how i can send data to the microblaze from outside the FPGA board.I thought if i can prin...
1 comments posted 21yrs
posted by kittyawake
1 comments posted 21yrs posted by kittyawake

rocketio decoupling

Hi, I work on a project involving the rocketios. I have read the user guide and among other things notcied the decoupli...
4 comments posted 21yrs
posted by jfhasson
4 comments posted 21yrs posted by jfhasson

Power supply design

Hello, I would like to build a prototype power supply for my project, and since I don't have real data about its power...
1 comments posted 21yrs
posted by wyderskiREMOVE
1 comments posted 21yrs posted by wyderskiREMOVE

FPGA Design Introduction

Hi I wonder if I could find online a good introduction to start with FPGA and hardware design. So the document should s...
0 comments posted 21yrs
posted by ernte23
0 comments posted 21yrs posted by ernte23

Differential timing specification in Xilinx FPGA

Hello, I am searching how to specify a relative timing constraint (and not a placement constraint) that would be enforc...
1 comments posted 21yrs
posted by nospam
1 comments posted 21yrs posted by nospam

Xilinx tools on Linux

There are ISE Foundation and ISE Webpack versions for Red Hat Enterprise Linux 3.0 How strict is this port? Has anybody...
52 comments posted 21yrs
posted by dmsbox2000-news1
52 comments posted 21yrs posted by dmsbox2000-news1

hdl designer cvs in remote repository

has anyone figured out how to do a cvs operation using HDL Designer? i use cvsroot as :extssh:name@domain:/cvsroot_path...
0 comments posted 21yrs
posted by nachiket
0 comments posted 21yrs posted by nachiket

Technical Journals on FPGAs

Can anyone provide a recommendation on which journal or transaction series one ought to subscribe to in the IEEE family...
0 comments posted 21yrs
posted by JoeG
0 comments posted 21yrs posted by JoeG

ISE 7.1 GUI (slightly OT)

Hi, This is a slightly off topic question. I have been following this discussion about the new ISE 7.1. Before it got r...
3 comments posted 21yrs
posted by dan_nospam_noritzer
3 comments posted 21yrs posted by dan_nospam_noritzer

EDK:input to microblaze

hi, I want to input data from outside the board to the microblaze.can i do it using uart in my design?Can i make this d...
7 comments posted 21yrs
posted by kittyawake
7 comments posted 21yrs posted by kittyawake

Hobby or job? (FPGA User's groups anyone?)

I've been following this newsgroup off and on for the last couple of years and I notice a steadily increasing amount of...
11 comments posted 21yrs
posted by ptkwt
11 comments posted 21yrs posted by ptkwt

salary ballpark please guys

Hi to all, Just wondering if you could give me an idea of a current salary ballpark for the following details/person: P...
27 comments posted 21yrs
posted by no
27 comments posted 21yrs posted by no

DCI question

Hi all, I have a very peculiar problem with some digitally controlled impedance (DCI) inputs on a Virtex2 device: whene...
1 comments posted 21yrs
posted by jakab.tanko
1 comments posted 21yrs posted by jakab.tanko