For the switches that route signals in an FPGA, ideally, one wants something that does not delay signals, even if it takes longer to program than ordinary memory.
So the gate which determines where a signal should go should not be symmetric in terms of the time taken for the input to affect the output; the control input can be slow, but the signal input should not be delayed at all.
Electromechanical relays have this characteristic; the magnet takes time to move the contacts, but the signal that flows through the contacts, if they are closed, just flows through conductors and does not actuate anything - and so, is not delayed.
Of course they're not very practical on an FPGA chip. Or are they?
Texas Instruments' DLP chips, used in projection TVs, involve moving little pieces of metal around on chips. On a small scale, surface tension and adhesion are big problems, so this may be difficult... but maybe it is possible to build an FPGA whose programmable routing to the logic elements is made from a kind of electromechanical relay!