Latest threads in Field-Programmable Gate Arrays

Microblaze 4.0 with uClinux is ok or not?

Hi help - please could somebody confirm if the latest uclinux kernel would work with EDK 7.1 made system using MicroBla...

4 21yrs

antti

4 21yrs antti

32/16 divider, ASIC(Designware) Vs Xilinx FPGA(Coregen)

Hi all, I wanted to use a 32/16 divider circuit in one of my designs. I found Synopsys designware provides Pipelined di...

5 21yrs

john.deepu

5 21yrs john.deepu

how to use FPU with EDK7.1i

Hi All, I used EDK7.1i to do some projects(Microblaze core), in the projects there are many floating point computing, s...

1 21yrs

lnzhao

1 21yrs lnzhao

Xilinx + ModelSim XE Linux

Hi all, I'm happy to see Xilinx is releasing their WebPack for Linux, and with a couple of minor tweaks, it actually wo...

3 21yrs

tmccoy

3 21yrs tmccoy

ORCAD CIS 7.2

Does anyone have experience with Orcad Express CIS 7.2? I am trying to creat an EDIF or EDN file that can be used in is...

0 21yrs

learnfpga

0 21yrs learnfpga

TI TMS320 DSP as a soft-processor in FPGA?

Hello to all! Does anyone know of a design involving a TI TMS320 DSP as a soft-processor in FPGA? I found the model of...

0 21yrs

bmscc

0 21yrs bmscc

*.mcs format file can't contain over 1Mbyte data?

It might be a silly question, but I want to make sure somthing. I got a description about *.mcs file like below -------...

1 21yrs

aw2310

1 21yrs aw2310

How to get .mcs file containing both .bit and *.elf file, to port linux on my memec virtex-ii board.

Hello I have 'Virtex II pro FF1152 board, Rev.3' made by Memec design. I read the document 'Getting Started with EDK an...

2 21yrs

aw2310

2 21yrs aw2310

FPGA : MAC FIR doubt--HELP ME PLEASE

Hi I have used Coregnerator FIR filter in my desing. Initially i have used fixed coefficients, which is stored in BRAM...

7 21yrs

pbijoy

7 21yrs pbijoy

Xilinx ISE Webpack download problem

Hi I am new to FPGA and wanted to try out the ISE Webpack from Xilinx, I have registered at the site but when I try to...

0 21yrs

kundol30

0 21yrs kundol30

Query - ChipScope Pro analyzer

Hi , When I tried to use Chipscope Pro Analyzer for programming the V2Pro fpga . I was able to succesfully connect the...

1 21yrs

nkishorebabu123

1 21yrs nkishorebabu123

Great Tutorial on Signal Integrity, SSOs, Ground Bounce etc

Are you concerned about simultaneously switching outputs, ground bounce, and inductive crosstalk in BGA packages? Then...

26 21yrs

peter

26 21yrs peter

Share one BRAM block between user logic and microblaze (Spartan3)

I want to share one BRAM block (RAMB16_S9_Sxx) between microblaze and my user logic. My user logic would use PortA (8 b...

7 21yrs

zoltan_csizmadia

7 21yrs zoltan_csizmadia

edk 6.3 : INTERNEL_ERROR

Hi, While taking my first steps with the EDK, I'm running into problems right away. - clean install of ISE 6.3i and EDK...

2 21yrs

xilinx

2 21yrs xilinx

not clear about doing power estimation using xpower

hi, i am trying to do power estimation for xilinx fpga and decided use the xilinx xpower.i am not sure about how to fil...

11 21yrs

savdeep

11 21yrs savdeep

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