Latest threads in Field-Programmable Gate Arrays

Looking for a DIgital Systems book with JPEG example code

About a year and a half ago I came across a book on digital systems design that I liked. I can't remember the title or...

2 21yrs

DerekSimmons

2 21yrs DerekSimmons

VHDL: Address Decoder

Attached is my first cut at an address decoder. While it works I am not sure it's the best method. Also I am not sure w...

5 21yrs

USB tranciever + controller in FPGA

I'm trying to put together a small board design that I can use to verify the functionality of a microcontroller that ha...

2 21yrs

desert_fox_properties

2 21yrs desert_fox_properties

TAP controller

Hello, I'm a soft designer. I want to access Spartan board with JTAG interface. I do not have kwoledge about electronic...

0 21yrs

dd

0 21yrs dd

FFT implementation in Xilinx Spartan 3 started kit

Hi members, I am a student and completely new to FPGA. I am learning VHDL. My objective is to implement FFT in spartan-...

7 21yrs

biot.spm

7 21yrs biot.spm

ARM IP Core implementation in FPGA

Hi All, i request some of you guys who worked or having knowledge on imlementation of ARM core with MBA bus in FPGA.Bas...

1 21yrs

sudarangareddy

1 21yrs sudarangareddy

fan out capability of FPGA

Hello all, In my design there is a possibility (its dynamic) that a register may get connect to inputs of 172 gates. Is...

6 21yrs

vssumesh_asic

6 21yrs vssumesh_asic

XilinX MAC FIR

Hi everybody I'm working on a small project in which we want basically to filte Input data (Input Data Rate = 105Mhz) w...

3 21yrs

sebastien.coquet

3 21yrs sebastien.coquet

Is a CPLD appropriate for this triple PWM application?

I am thinking of using a lowcost CPLD as a brain to do various logic functions in addition to driving 3 separate PWM ge...

24 21yrs

solarfrenchyNO

24 21yrs solarfrenchyNO

edk service pack download

Hi guy, where i can download the edk service pack never product registration? thanks bss

0 21yrs

bassos

0 21yrs bassos

FIFO design using Virtex-II block ram..

Hi all We've set up a simple FIFO on a Spartan3 FPGA using the free code from Xilinx XApp258 (FifoCTLR_IC_V2.vhd) Initi...

6 21yrs

whybcuz

6 21yrs whybcuz

Spartan-3 1000 -5 availability

Does anyone know what the current delivery situation is for XC3S1000-5FT256C. On Xilinx's website they say 3-4 weeks, b...

2 21yrs

removfinnstadel

2 21yrs removfinnstadel

floppycontroller

Hi All, I'm looking for a fpga/vhdl implementation for a simple floppy-controller. Has someone an idea or adress or code...

0 21yrs

reverse_engineer

0 21yrs reverse_engineer

24 Counters on one board

Hello everyone, I am a totally newbie with FPGA, I really need some help for our project. We have 24 simple digital sig...

4 21yrs

lewang

4 21yrs lewang

Migration Altera APEX20KE to ???

In my actual design I'm using an Altera APEX20KE with 200,000 gates. In my next (larger) design I want to use an newer...

4 21yrs

manfred.balik

4 21yrs manfred.balik

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