Hi everybody I'm working on a small project in which we want basically to filte Input data (Input Data Rate = 105Mhz) with a FIR filter (6 coefficients) I've forseen to use the MAC FIR IP provided by Xilinx but there coul be a problem in the way input data are sampled
Indeed, MAC FIR IP provides an output named RFD(Ready For Data) whic
indicates when the MAC FIR can accept new data
Does that mean ND (New Data signal) can't be stay at '1' to put ne
data in FIR at each rising edge of clock sample (105 MHz)
Since my Input data flow is unbroken, how can I do to process thi
flow in real time
Is there other free FIR IP more suitable for my application
Thank you in advance for your answers
PS: I'm a french guy, so I hope my english is not too bad and you wil able to understand what I mean ... :oops