Field-Programmable Gate Arrays

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Lead To Lead Free ROHS help?

If you need some ROHS help I work as a component engineer out in San Diego county California. I have a service that hel...
0 comments posted 20yrs
posted by dolbowent
0 comments posted 20yrs posted by dolbowent

Xilinx V2P Speed Grades

Hi there, Has anyone of you experience with the speed gain on a Virtex2Pro when going from -5 to -6? I mean, the differ...
0 comments posted 20yrs
posted by sheinzle
0 comments posted 20yrs posted by sheinzle

Thank-you Xilinx!

The Platform Flash configuration devices are finally available on the online store! -Eli
1 comments posted 20yrs
posted by emh203
1 comments posted 20yrs posted by emh203

Simulating Cyclone II PLL

Hi, I've got a problem which has me stumped. We've got a design that actually *runs* in real hardware. I'm in the proce...
2 comments posted 20yrs
posted by markm
2 comments posted 20yrs posted by markm

Xilinx ML403 Error 1 LED

Hi I just got two ML403 boards. 2nd board when turned on with the cf card in the Error 1 LED is displayed. There is no...
4 comments posted 20yrs
posted by
4 comments posted 20yrs posted by

question on sw tools for xilnx FPGA

Hi, I just started to learn FPGA (xilinx) with ISE 7.1 and ModelSim XE III. If I want to use microblaze or other IP core...
2 comments posted 20yrs
posted by ppirrip
2 comments posted 20yrs posted by ppirrip

Quartus II Simulation

Hello, I am trying to use .vwf files to simulate some designs (I'm not doing this out of choice...being forced to do it...
2 comments posted 20yrs
posted by saurster
2 comments posted 20yrs posted by saurster

Integrator

Hallo, How may I realize an integrator into a FPGA? Many Thanks Marco
2 comments posted 20yrs
posted by marcotoschi
2 comments posted 20yrs posted by marcotoschi

[xst]:clk information question

Hey, i made a design for a LVDS input (with some tweaks) and the design is working but i found this info warning in the...
0 comments posted 20yrs
posted by tim.verstraete
0 comments posted 20yrs posted by tim.verstraete

Memory usage and ISE

Hi All, I am trying to P&R an XC2V8000 with a large number of MCP constraints on a 2GB (+2GB swap, /3GB switch in boot....
1 comments posted 20yrs
posted by hans64
1 comments posted 20yrs posted by hans64

SystemACE parts wanted

Hi, Does anyone have any SystemACE parts for sale (upto 15 pieces) or know any distributor who has some in stock? Cheers...
7 comments posted 20yrs
posted by jon
7 comments posted 20yrs posted by jon

array type implementable in ISE?

hi In my implementation, top entity has some pins with array type in VHDL. It is strange that ISE does not map / place a...
1 comments posted 20yrs
posted by JEmoderatz
1 comments posted 20yrs posted by JEmoderatz

Why are there two patents with same title

Hi, Why are there two patents with same title? What are their major purposes? For example: Altera patents: 6,859,065 Us...
6 comments posted 20yrs
posted by wtx
6 comments posted 20yrs posted by wtx