hi
In my implementation, top entity has some pins with array type in VHDL.
It is strange that ISE does not map / place and route.
Does someone have same experience?
hi
In my implementation, top entity has some pins with array type in VHDL.
It is strange that ISE does not map / place and route.
Does someone have same experience?
Jack schrieb:
Of course, many people have the same experience. It happens quite frequently that ISE does not map, place and route. And even more frequently that it does not synthesize. This happens both with and without arrays.
Most of the time it is a bug in your HDL, sometimes it is a bug in ISE. One possible solution for the former case is to fix the bug.
Kolja Sulimma
Have something to add? Share your thoughts — no account required.
Ask the community — no account required