Latest threads in Field-Programmable Gate Arrays

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2 20yrs

fpgasps

2 20yrs fpgasps

Virtex 4 deconfiguring itself ...

Hello, We're currently working on a design running on a Virtex4 SX35. That design uses most of the resources of the FPG...

3 20yrs

SomeOne

3 20yrs SomeOne

Ace file for design with dual ppc405

I'm currently using the Xilinx ML310 development board. Anybody knows how to generate ace file for designs with dual ppc...

5 20yrs

king.azman

5 20yrs king.azman

Simulation tool

Hi, What simulation tool will enable me to read internal signals/registers?

3 20yrs

adventleaf

3 20yrs adventleaf

Microblaze to My IP-Core connection

Hi, I created my test IP-core (ANDgate) on ISE and imported it to XPS t connect it to the microblaze. I am using Sparta...

0 20yrs

awetyemane

0 20yrs awetyemane

FATAL_ERROR while creating a test bench waveform (ISE WebPack 8.1.01i)

Hi, I am getting the following error when trying to add test bench waveform to one of my design files. After that, ISE...

2 20yrs

bobrics

2 20yrs bobrics

Fixed vs Float ?

Hello all, Concerning digital filters, particurlarly IIR filters, is there a preferred approach to implementation - Are...

10 20yrs

rover8898

10 20yrs rover8898

PacoBlaze with multiply and 16-bit add/sub instructions

Hello people. As I announced some days ago, I updated the PacoBlaze3 core [http://bleyer.org/pacoblaze/] now with a wid...

9 20yrs

pablobleyer

9 20yrs pablobleyer

ignore thread

All, I found that mozilla email supports a really useful feature: it is "ignore thread." I know, everyone else probably...

4 20yrs

austin

4 20yrs austin

Xilinx programming cable; Linux notebook w/o parallel port; Am I doomed?

Hi, I bowsed through some threads about using the various Xilinx programming cables. It seems like with my Linux notebo...

12 20yrs

GHEDWHCVEAIS

12 20yrs GHEDWHCVEAIS

DDS

I would like to implement a DDS on a Spartan device. Here are is my spec Clocked at 200MHz. Max Output of 80MHz. 1uHz in...

13 20yrs

maxascent

13 20yrs maxascent

SMTP

hello, I have to do a program in VHDL which sends email via the SMTP protocol on the Pegasus board. I have to use the X...

0 20yrs

leibnizster

0 20yrs leibnizster

Looking for a V4FX development board

Hi, I'm looking for a V4FX devel. board, with both optical (e.g. SFP)MGTs and ddr2 memory (especially one with DIMM mod...

2 20yrs

gpouikli

2 20yrs gpouikli

What are the major difference between MXE 6.0 and MXE 5.7?

I am using the MXE 5.7 with free license, but sometimes it seems unable to handle too large designs. What are the main u...

1 20yrs

novice

1 20yrs novice

VHDL LUT

Hi, Can anybody please tell me what is wrong with the following code? In post-translate simulation there are a few unex...

2 20yrs

alastairlynch

2 20yrs alastairlynch

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