Field-Programmable Gate Arrays

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vertex II and powerpc core

Was the Xilinx powerpc core ever produced for the Vertex II device?
4 comments posted 20yrs
posted by scot.willis
4 comments posted 20yrs posted by scot.willis

Problem with Xilinx FTP

What happens to Xilinx ftp with the following URL ftp://ftp.xilinx.com/pub/ftpfiles.htm Most of the files can not be dow...
1 comments posted 20yrs
posted by u1000393
1 comments posted 20yrs posted by u1000393

Spartan3E readback, SPI programming

Greetings, I'd like to program my Spartan3E with an SPI memory normally. For development at my desk, I understand I can...
15 comments posted 20yrs
posted by johnhandwork
15 comments posted 20yrs posted by johnhandwork

Print FAT table in a compact flash ??????????

Hi Im trying to access the FAT table in a compact flash. from what i have understood i have got sandisk 256mb compact f...
2 comments posted 20yrs
posted by sachink321
2 comments posted 20yrs posted by sachink321

libbasxi.dll

Hi, I am looking for this library file libbasxi.dll which probably exist under \winnt\system32 OR \winnt\system OR \win...
0 comments posted 20yrs
posted by karim.moussouni
0 comments posted 20yrs posted by karim.moussouni

pci-express engineer

Are there any engineer with pci-express IC design experience at Tw or China? you can contact me. snipped-for-privacy@yah...
0 comments posted 20yrs
posted by coutausse
0 comments posted 20yrs posted by coutausse

PCB Prototype Supply!!!!(CHINA)

if any question, please send mail us!!!!!! Sell high quality HDI PCB (CHINA) we send pcb by DHL or UPS ( Send to USA Ab...
0 comments posted 20yrs
posted by njbp188
0 comments posted 20yrs posted by njbp188

Spartan 3E Starter Kit is finally here!

I was finally able to order a Spartan 3E Starter Kit from Avnet late last week. (Before that the Xilinx site said that...
4 comments posted 20yrs
posted by eric
4 comments posted 20yrs posted by eric

xilinx board xupv2p xc2v30 software dev. doubt

I use the XUPV2P dev. board which contains XC2V30 chip. It contains flash memory interface (ACE controller) and DDR Mem...
0 comments posted 20yrs
posted by prakash.na
0 comments posted 20yrs posted by prakash.na

State Machine and Area Estimate Question

Hi, I have a design with 2 components, each of which implement a small but non trivial state machine. Each one has an a...
2 comments posted 20yrs
posted by ssirowy
2 comments posted 20yrs posted by ssirowy

ISE 7.1 Map Error

I'm attempting to an EDK project containing some custom logic to decode an NTSC video stream. When I implement using ED...
0 comments posted 20yrs
posted by mfornero
0 comments posted 20yrs posted by mfornero

PCI speed.

Hi. I have a PCI board developed and I have little acess to the FPGA PCI core, since it was not developed in house. I c...
6 comments posted 20yrs
posted by spamgoeshere1978
6 comments posted 20yrs posted by spamgoeshere1978

Altera Nios II & PCI Compiler 4.1.0 Question

Hi, I'm using SOPC Builder and added some components, including NIOS II, external RAM and a PCI Host-Bridge (PCI Compil...
2 comments posted 20yrs
posted by sanderA_en_stienekeB
2 comments posted 20yrs posted by sanderA_en_stienekeB

gemac

I have a doubt regarding the gemac core which we can generate using the core generator with hardware evaluation license...
0 comments posted 20yrs
posted by dhruvakshad
0 comments posted 20yrs posted by dhruvakshad

spartan-3 starter kit board

Hi everybody Sorry for the basic question. I'm starting with FPGA and I'm using a Spartan-3 Starter Kit board. I would...
2 comments posted 20yrs
posted by jmariano
2 comments posted 20yrs posted by jmariano